公开(公告)号：US08327369B2

公开(公告)日：2012-12-04

申请号：US11941555

申请日：2007-11-16

申请人： Fred A. Bower, III

发明人： Fred A. Bower, III

IPC分类号： G06F9/50

CPC分类号： G06F9/4843

摘要： A driver is provided to manage launching of tasks at different levels of priority and within the parameters of the firmware interface. The driver includes two anchors for managing the tasks, a dispatcher and an agent. The dispatcher operates at a medium priority level and manages communication from a remote administrator. The agent functions to receive communications from the dispatcher by way of a shared data structure and to launch lower priority level tasks in respond to the communication. The shared data structure stores communications received from the dispatcher. Upon placing the communication in the shared data structure, the dispatcher sends a signal to the agent indicating that a communication is in the data structure for reading by the agent. Following reading of the communication in the data structure, the agent launches the lower priority level task and sends a signal to the data structure indicating the status of the task. Accordingly, a higher level task maintains its level of operation and spawns lower level tasks through the dispatcher in conjunction with the agent.

摘要翻译： 提供了一个驱动程序来管理不同级别的任务在固件界面的参数内启动任务。 驱动程序包括两个用于管理任务的锚点，一个调度员和一个代理。 调度员以中等优先级操作，并管理来自远程管理员的通信。 该代理的功能是通过共享数据结构从分派器接收通信，并发起较低优先级的任务来响应通信。 共享数据结构存储从调度器接收的通信。 在将通信置于共享数据结构中之后，调度器向代理发送一个信号，指示通信处于数据结构中以供代理读取。 在数据结构中的通信读取之后，代理启动较低优先级的任务，并向指示状态的数据结构发送一个信号。 因此，较高级别的任务保持其操作水平，并通过调度员与代理一起产生较低级别的任务。

公开(公告)号：US20120154165A1

公开(公告)日：2012-06-21

申请号：US12971749

申请日：2010-12-17

申请人： Fred A. Bower, III ,  Michael H. Nolterieke ,  William G. Pagan

发明人： Fred A. Bower, III ,  Michael H. Nolterieke ,  William G. Pagan

IPC分类号： G08B21/00

CPC分类号： G06F15/161

摘要： In one embodiment, a computer system has a plurality of chassis interconnected by cables. Each cable initially connects a unique port pair consisting of a port of one chassis and a port of another chassis. The disconnection of cables is monitored, including electronically recording a disconnection sequence in which the port pairs are disconnected by removing each cable from at least one port of the respective port pair. Visual guidance is provided for re-cabling the computer system by sequentially identifying the port pairs in a reversal of the disconnection sequence, wherein identifying each port pair includes illuminating visual indicators associated with the ports of each port pair with a matching illumination pattern.

摘要翻译： 在一个实施例中，计算机系统具有通过电缆互连的多个机架。 每个电缆最初连接由一个机箱的端口和另一个机箱的端口组成的唯一端口对。 监视电缆的断开，包括通过从相应端口对的至少一个端口移除每根电缆来电子地记录端口对断开的断开序列。 提供视觉指导，用于通过在断开序列的反转中顺序识别端口对来重新布线计算机系统，其中识别每个端口对包括与具有匹配的照明模式的每个端口对的端口相关联的照明视觉指示符。

公开(公告)号：US20110282979A1

公开(公告)日：2011-11-17

申请号：US12778187

申请日：2010-05-12

申请人： Fred A. Bower, III ,  Michael H. Nolterieke ,  William G. Pagan

发明人： Fred A. Bower, III ,  Michael H. Nolterieke ,  William G. Pagan

IPC分类号： G06F15/177 ,  G06F15/173

CPC分类号： H04L61/2061 ,  H04L29/12283 ,  H04L29/12981 ,  H04L61/609

摘要： In a data center that includes a number of chassis, with each chassis including a chassis management module and a number of slots, each slot associated with a service processor: network address assignment includes discovering, by a chassis management module of a particular chassis, one or more other chassis management modules; negotiating, by the chassis management module with the other chassis management modules via IPv6 data communications, a chassis-specific range of IPv4 addresses available for assignment to service processors of the particular chassis; providing, by the chassis management module to the service processors of the particular chassis, in dependence upon the chassis-specific range of IPv4 addresses, a base IPv4 address; and determining, by each service processor of the particular chassis, in dependence upon the base IPv4 address and a slot identifier of the slot associated with the service processor, an IPv4 address for the service processor.

摘要翻译： 在包含多个机箱的数据中心中，每个机箱包括机箱管理模块和多个插槽，每个插槽与服务处理器相关联：网络地址分配包括由特定机箱的机箱管理模块发现一个 或更多其他机箱管理模块; 通过机箱管理模块与其他机箱管理模块通过IPv6数据通信协商，特定于机架的IPv4地址范围可用于分配给特定机箱的服务处理器; 基于IPv4地址的机箱特定范围，由机箱管理模块向特定机箱的服务处理器提供基本IPv4地址; 以及由所述特定机架的每个服务处理器根据所述基本IPv4地址和与所述服务处理器相关联的时隙的时隙标识符确定所述服务处理器的IPv4地址。

公开(公告)号：US07415644B2

公开(公告)日：2008-08-19

申请号：US10971347

申请日：2004-10-22

申请人： Fred A. Bower, III ,  Sule Ozev ,  Paul G. Shealy ,  Daniel J. Sorin

发明人： Fred A. Bower, III ,  Sule Ozev ,  Paul G. Shealy ,  Daniel J. Sorin

IPC分类号： G01R31/28

CPC分类号： G11C29/4401 ,  G11C29/76 ,  G11C2029/0401

摘要： A level of indirection is utilized when writing to a microprocessor array structure, thereby masking hard faults in the array structure. Among other benefits, this minimizes the use of a backward error recovery mechanism with its inherent delay for recovery. The indirection is used to effectively remove from use faulty portions of the array structure and substitute spare, functioning portions to perform the duties of the faulty portions. Thus, for example, faulty rows in microprocessor array structures are mapped out in favor of substitute, functioning rows.

摘要翻译： 在写入微处理器阵列结构时，利用间接级别，从而掩盖阵列结构中的硬故障。 除了其他好处之外，这最大限度地减少了其恢复的固有延迟的后向错误恢复机制的使用。 该间接用于有效地从使用阵列结构的错误部分中去除并替换备用功能部分来执行故障部分的任务。 因此，例如，微处理器阵列结构中的错误行被映射到有利于替代的功能行。