公开(公告)号：US20140367794A1

公开(公告)日：2014-12-18

申请号：US13920780

申请日：2013-06-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Nigel Chan ,  Michael Otto

IPC: H01L27/11

CPC classification number: H01L27/1104 ,  H01L27/0207

Abstract: A device includes an array of a plurality of memory cells, at least one N-well contact area and at least one P-well contact area. The memory cells are arranged in a plurality of rows and a plurality of columns. Each column includes an N-well region and at least one P-well region. The N-well and P-well regions extend between a first end of the column and a second end of the column. Each N-well contact area electrically contacts at least one of the N-well regions, wherein the N-well region of at least one of the columns is electrically contacted at only one of the first and second ends of the column. Each P-well contact area electrically contacts at least one of the P-well regions, wherein the P-well region of at least one of the columns is electrically contacted at only one of the first and second ends of the column.

Abstract translation: 一种器件包括多个存储器单元的阵列，至少一个N阱接触区域和至少一个P阱接触区域。 存储单元布置成多行和多列。 每列包括N阱区和至少一个P阱区。 N阱和P阱区域在柱的第一端和柱的第二端之间延伸。 每个N阱接触区域电接触N阱区域中的至少一个，其中至少一个柱的N阱区域仅在柱的第一和第二端中的一个处电接触。 每个P阱接触区域电接触至少一个P阱区域，其中至少一个柱的P阱区域仅在柱的第一和第二端中的一个处电接触。