Method of forming isolated wells in the fabrication of BiCMOS devices
    31.
    发明授权
    Method of forming isolated wells in the fabrication of BiCMOS devices 失效
    在BiCMOS器件制造中形成隔离阱的方法

    公开(公告)号:US5268312A

    公开(公告)日:1993-12-07

    申请号:US964700

    申请日:1992-10-22

    摘要: A junction isolated P-well is formed for high performance BiCMOS. Two dopants of opposite conductivity types are implanted and co-diffused inside an annular N-type region to form a narrow N-type buried layer positioned between two P-type regions. N-type buried layer is formed having P-type doped regions above and below the N-type buried layer so that the N-type buried layer is narrow. The P-type region above the N-type buried layer provides for a retrograde profile of the P-well formed above it. Besides the P-well isolation, the P-type region below the N-type buried layer acts as a ground plane which collects noise, which helps to prevent it from being coupled to other devices of the BiCMOS circuit.

    摘要翻译: 形成了用于高性能BiCMOS的结隔离P阱。 相反导电类型的两种掺杂剂被注入并共扩散在环形N型区域内以形成位于两个P型区域之间的窄N型掩埋层。 N型掩埋层在N型掩埋层的上方和下方形成有P型掺杂区域,使得N型掩埋层窄。 N型掩埋层上方的P型区域提供了形成在其上的P阱的逆行剖面。 除了P阱隔离之外,N型掩埋层以下的P型区域用作收集噪声的接地平面,这有助于防止其耦合到BiCMOS电路的其他器件。