公开(公告)号：US20160219225A1

公开(公告)日：2016-07-28

申请号：US14603354

申请日：2015-01-22

Applicant: GOOGLE INC.

Inventor： Qiuling Zhu ,  Ofer Shacham ,  Jason Rupert Redgrave ,  Daniel Frederic Finchelstein ,  Albert Meixner

IPC: H04N5/262

CPC classification number: H04N5/262 ,  G06T1/20 ,  G06T1/60

Abstract: In a general aspect, an apparatus can include image processing logic (IPL) configured to perform an image processing operation on pixel data corresponding with an image having a width of W pixels and a height of H pixels to produce output pixel data in vertical slices of K pixels using K vertically overlapping stencils of S×S pixels, K being greater than 1 and less than H, S being greater than or equal to 2, and W being greater than S. The apparatus can also include a linebuffer operationally coupled with the IPL, the linebuffer configured to buffer the pixel data for the IPL. The linebuffer can include a full-size buffer having a width of W and a height of (S−1). The linebuffer can also include a sliding buffer having a width of SB and a height of K, SB being greater than or equal to S and less than W.

Abstract translation: 在一般方面，一种装置可以包括图像处理逻辑（IPL），被配置为对与具有W像素的宽度和H像素的高度的图像相对应的像素数据执行图像处理操作，以在垂直切片中产生输出像素数据 K个像素，使用S×S像素的K个垂直重叠的模板，K大于1且小于H，S大于或等于2，并且W大于S.该装置还可以包括线缓冲器，其操作上与 IPL，线缓冲器被配置为缓冲IPL的像素数据。 线缓冲器可以包括宽度为W且高度为（S-1）的全尺寸缓冲器。 线缓冲器还可以包括具有SB的宽度和K的高度的滑动缓冲器，SB大于或等于S且小于W.