公开(公告)号：US5805497A

公开(公告)日：1998-09-08

申请号：US827367

申请日：1997-03-27

申请人： Tetsuya Uchida

发明人： Tetsuya Uchida

IPC分类号： H01L21/8244 ,  H01L27/11 ,  H01L27/12 ,  H01L29/786 ,  H01L29/76

CPC分类号： H01L27/1112 ,  H01L27/1203

摘要： A semiconductor static random access memory cell is implemented by four field effect transistors formed on a silicon layer over a buried silicon oxide layer and two resistors formed in an inter-level insulating structure; additional capacitors are formed under the buried silicon oxide layer, and are respectively connected to the gate electrodes of the field effect transistors serving as driving transistors of the memory cell so as to enhance the stability of the memory cell without increase the transistor size.

摘要翻译： 半导体静态随机存取存储单元由形成在掩埋氧化硅层上的硅层上的四个场效应晶体管和形成在层间绝缘结构中的两个电阻器来实现; 附加的电容器形成在掩埋的氧化硅层下面，分别连接到用作存储单元的驱动晶体管的场效应晶体管的栅电极，从而在不增加晶体管尺寸的情况下提高存储单元的稳定性。