Carrier tape
    31.
    发明授权
    Carrier tape 失效
    载带

    公开(公告)号:US5196917A

    公开(公告)日:1993-03-23

    申请号:US444973

    申请日:1989-12-04

    IPC分类号: H01L21/56 H01L21/60 H01L23/48

    CPC分类号: H01L23/48 H01L2224/16

    摘要: A carrier tape includes an insulating film supporting a plurality of leads. The film has a center device hole for receiving a semiconductor chip therein, a plurality of outer lead holes formed at the periphery of the center device hole, a lead supporting portion positioned between the center device hole and the outer lead holes, and a link portion positioned between a pair of adjacent outer lead holes and connected to the lead supporting portion for directing the flow of molten resin during encapsulation of the semiconductor chip. The link portion includes an opening or recess. The plurality of leads of the carrier tape are supported on the lead supporting of the film, with one end portion of each lead projecting into the center device hole of the film. During manufacture, a semiconductor chip having a plurality of electrodes is positioned within the center device hole, and the leads are electrically connected to respective electrodes of the semiconductor chip. The resultant chip is placed within a cavity of a mold, and a molten resin is injected into the cavity through the opening or recess passage formed in the link portion of the film.

    摘要翻译: 载带包括支撑多根引线的绝缘膜。 薄膜具有用于容纳半导体芯片的中心装置孔,形成在中心装置孔周边的多个外部引线孔,位于中心装置孔和外部引线孔之间的引线支承部分,以及连接部分 定位在一对相邻的外引线孔之间并连接到引线支撑部分,用于在半导体芯片封装期间引导熔融树脂的流动。 连杆部分包括开口或凹槽。 载带的多个引线被支撑在膜的引线支撑上,每个引线的一个端部突出到膜的中心装置孔中。 在制造过程中,具有多个电极的半导体芯片位于中心器件孔内,引线与半导体芯片的各个电极电连接。 将所得的芯片放置在模具的空腔内,并且通过形成在薄膜的连接部分中的开口或凹槽通道将熔融树脂注入空腔中。