公开(公告)号：US4339674A

公开(公告)日：1982-07-13

申请号：US186769

申请日：1980-09-12

申请人： Masaru Hashimoto

发明人： Masaru Hashimoto

IPC分类号： H03K3/0233 ,  H03K3/2897 ,  H03K5/153

CPC分类号： H03K3/2897

摘要： A trigger circuit comprises first, second and third transistors whose emitters are connected in common to a constant current source, a current mirror having input and output terminals connected respectively to the collectors of the second and third transistors, a diode connected between the collector of the first transistor and the input terminal of the current mirror, and a switching transistor whose base and collector are connected respectively to the output terminal of the current mirror and the collector of the first transistor. The bases of the first and second transistors are connected in common to a first input terminal, while the base of the third transistor is connected to a second input terminal. A trigger signal is applied between the first and second input terminals. The diode and switching transistor are on and off respectively in one of two stable states of the trigger circuit, and are off and on respectively in the other. The threshold voltage levels of the circuit depend on the mirror ratio of the current mirror and the geometric dimensions of the first, second and third transistors.

摘要翻译： 触发电路包括第一，第二和第三晶体管，其发射极共同连接到恒流源，电流镜具有分别连接到第二和第三晶体管的集电极的输入和输出端子，连接在第二和第三晶体管的集电极之间的二极管 第一晶体管和电流镜的输入端，以及基极和集电极分别连接到电流镜的输出端和第一晶体管的集电极的开关晶体管。 第一和第二晶体管的基极共同连接到第一输入端，而第三晶体管的基极连接到第二输入端。 在第一和第二输入端之间施加触发信号。 二极管和开关晶体管分别在触发电路的两个稳定状态中的一个中分别导通和关断，另一个断开和接通。 电路的阈值电压电平取决于电流镜的镜像比和第一，第二和第三晶体管的几何尺寸。