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    Method and apparatus for analyzing and debugging natural language parses
    31.
    发明授权
    Method and apparatus for analyzing and debugging natural language parses 有权
    分析和调试自然语言分析的方法和装置

    公开(公告)号：US07379862B1

    公开(公告)日：2008-05-27

    申请号：US09443779

    申请日：1999-11-19

    申请人： Su Chin Chang ,  Hajime Wada

    发明人： Su Chin Chang ,  Hajime Wada

    IPC分类号： G06F17/27

    CPC分类号： G06F17/2705

    摘要： A method and apparatus for analyzing and debugging natural language parses is provided. An input sentence is received and parsed by a parsing engine. A table of constituents is retrieved from the parsing engine and a grid tree is drawn representing the input sentence. Nodes of the tree, or connecting points, appear at intersections of the tree “branches.” Once the grid has been drawn, the first syntactically correct parse of the sentence is mapped to the grid in a tree-like manner (the “parse tree”). Input is then received for selecting one of several graphical buttons, for selecting a node that is in the parse tree, for selecting a node that is not in the parse tree, or for selecting options from one of several “pull-down” menus. If a connecting point that is not contained in the parse tree is selected, a group of menu options may be displayed adjacent to the selected connecting point. The user may select menu options for displaying successful rules applied at the connecting point, or for displaying unattempted and failed rules for the connecting point. If a connecting point that is contained in the parse tree (i.e. a constituent was formed at the connecting point) is selected, a second group of menu options may be displayed adjacent to the selected connecting point. The menu options may include displaying the name of the connecting point and the name of the rule that was applied at the connecting point to form the constituent.

    摘要翻译： 提供了一种用于分析和调试自然语言分析的方法和装置。 输入句子被解析引擎接收和解析。 从解析引擎中检索组成表，绘制表示输入句的网格树。 树或连接点的节点出现在树“枝”的交叉处。 一旦绘制了网格，句子的第一个语法正确的解析将以树状的方式（“解析树”）映射到网格。 然后接收输入以选择几个图形按钮之一，用于选择分析树中的节点，用于选择不在分析树中的节点，或用于从几个“下拉”菜单之一选择选项。 如果选择了不包含在解析树中的连接点，则可以在所选择的连接点附近显示一组菜单选项。 用户可以选择用于显示在连接点应用的成功规则的菜单选项，或用于显示连接点的未被激活和失败的规则。 如果选择包含在解析树中的连接点（即，在连接点处形成组成部分），则可以在所选择的连接点附近显示第二组菜单选项。 菜单选项可能包括显示连接点的名称和在连接点应用的规则的名称以形成组成部分。

    System and method for gate formation in a semiconductor device
    32.
    发明授权
    System and method for gate formation in a semiconductor device 有权
    用于半导体器件中栅极形成的系统和方法

    公开(公告)号：US07320914B1

    公开(公告)日：2008-01-22

    申请号：US11062629

    申请日：2005-02-23

    申请人： Hajime Wada ,  Jaeyong Park

    发明人： Hajime Wada ,  Jaeyong Park

    IPC分类号： H01L21/336

    CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11568

    摘要： A method for forming a memory device is provided. A first layer is formed over a substrate. A second layer is formed over the first layer. A mask is formed over the second layer. Spacers are formed adjacent opposite sides of the mask. The second layer is etched to form at least one memory cell stack. The memory device is cleaned to remove the mask. A silicide region is formed within the second layer in the at least one memory cell stack, where the silicide region in each memory cell stack is bounded by the spacers.

    摘要翻译： 提供了一种用于形成存储器件的方法。 第一层形成在衬底上。 在第一层上形成第二层。 在第二层上形成掩模。 垫片邻近面罩的相对侧面形成。 蚀刻第二层以形成至少一个存储单元堆叠。 清洁存储器件以除去掩模。 在至少一个存储单元堆叠中的第二层内形成硅化物区域，其中每个存储单元堆叠中的硅化物区域被间隔物界定。

    Structure and method for protecting memory cells from UV radiation damage and UV radiation-induced charging during backend processing
    33.
    发明授权
    Structure and method for protecting memory cells from UV radiation damage and UV radiation-induced charging during backend processing 有权
    用于保护记忆细胞免受后期处理中的紫外线辐射损伤和紫外线辐射诱导的充电的结构和方法

    公开(公告)号：US06974989B1

    公开(公告)日：2005-12-13

    申请号：US10841933

    申请日：2004-05-06

    申请人： Cinti X. Chen ,  Boon-Yong Ang ,  Hajime Wada ,  Sameer S. Haddad ,  Inkuk Kang

    发明人： Cinti X. Chen ,  Boon-Yong Ang ,  Hajime Wada ,  Sameer S. Haddad ,  Inkuk Kang

    IPC分类号： H01L21/8246 ,  H01L21/8247 ,  H01L27/108 ,  H01L27/115

    CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11568

    摘要： According to one exemplary embodiment, a structure comprises a substrate. The structure further comprises at least one memory cell situated on the substrate. The structure further comprises a first interlayer dielectric layer situated over the at least one memory cell and over the substrate. The structure further comprises an oxide cap layer situated on the first interlayer dielectric layer. According to this exemplary embodiment, the structure further comprises an etch stop layer comprising TCS nitride situated on the oxide cap layer, where the etch stop layer blocks UV radiation. The structure further comprises a second interlayer dielectric layer situated on the etch stop layer. The structure may further comprise a trench situated in the second interlayer dielectric layer and the etch stop layer, where the trench is filled with copper. The structure may further comprise an anti-reflective coating layer situated on the second interlayer dielectric layer.

    摘要翻译： 根据一个示例性实施例，一种结构包括基底。 该结构还包括位于基板上的至少一个存储单元。 所述结构还包括位于所述至少一个存储单元上并位于所述衬底之上的第一层间介电层。 该结构还包括位于第一层间介电层上的氧化物覆盖层。 根据该示例性实施例，该结构还包括位于氧化物覆盖层上的包含TCS氮化物的蚀刻停止层，其中蚀刻停止层阻挡UV辐射。 该结构还包括位于蚀刻停止层上的第二层间介电层。 该结构还可以包括位于第二层间电介质层和蚀刻停止层中的沟槽，其中沟槽被铜填充。 该结构还可以包括位于第二层间介电层上的抗反射涂层。

    Semiconductor device having pocket and manufacture thereof
    34.
    发明授权
    Semiconductor device having pocket and manufacture thereof 有权
    具有口袋和制造的半导体器件

    公开(公告)号：US06483155B1

    公开(公告)日：2002-11-19

    申请号：US10046978

    申请日：2002-01-17

    申请人： Hajime Wada ,  Kenichi Okabe ,  Kou Watanabe

    发明人： Hajime Wada ,  Kenichi Okabe ,  Kou Watanabe

    IPC分类号： H01L2976

    CPC分类号： H01L21/26513 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/823412 ,  H01L21/823418 ,  H01L29/1083

    摘要： A semiconductor device has first and second active regions defined on the principal surface of a silicon substrate, a first n-channel MOS transistor formed in the first active region and having first extension regions and first pocket regions being deeper than the first extension regions and being doped with indium at a first concentration, and a second n-channel MOS transistor formed in the second active region and having second extension regions and second pocket regions being deeper than the second extension regions and being doped with indium at a second concentration lower than the first concentration. Boron ions may be implanted into the second pocket regions. The pocket regions can be formed by implanting indium ions and an increase in leak current to be caused by indium implantation can be reduced.

    摘要翻译： 半导体器件具有限定在硅衬底的主表面上的第一和第二有源区，形成在第一有源区中的第一n沟道MOS晶体管，并且具有比第一延伸区更深的第一延伸区和第一穴区， 掺杂有第一浓度的铟的第二n沟道MOS晶体管和形成在第二有源区中的第二n沟道MOS晶体管，并且具有比第二延伸区域更深的第二延伸区域和第二空穴区域，并且以比第二扩散区域低的第二浓度掺杂铟 首先集中 可以将硼离子注入到第二口袋区域中。 可以通过注入铟离子形成袋区域，并且可以减少由铟注入引起的泄漏电流的增加。