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公开(公告)号:US20220415255A1
公开(公告)日:2022-12-29
申请号:US17684227
申请日:2022-03-01
Applicant: Samsung Display Co., Ltd.
Inventor: HANBIT KIM , MEEJAE KANG , KEUNWOO KIM , DOO-NA KIM , SANGSUB KIM , DOKYEONG LEE , JAEHWAN CHU
IPC: G09G3/3233
Abstract: A pixel includes a first capacitor connected between a first electrode and a second electrode connected to a first node, a first transistor including a gate electrode connected to the first node, a first electrode connected to a second node, and a second electrode connected to a third node, a second transistor including a gate electrode that receives a data write gate signal, a first electrode that receives a data voltage, and a second electrode connected to the second node, a third transistor connected between the first node and the third node, a fourth transistor connected between the first node and an initialization voltage input terminal to which an initialization voltage is applied, an eighth transistor t connected to the third transistor and the fourth transistor, and an organic light emitting diode including an anode and a cathode receiving a second power supply voltage.
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公开(公告)号:US20220285404A1
公开(公告)日:2022-09-08
申请号:US17455188
申请日:2021-11-16
Applicant: Samsung Display Co., Ltd.
Inventor: KEUNWOO KIM
IPC: H01L27/12
Abstract: A display device includes a substrate including a polymer film, a first active pattern above the substrate, and including a first channel region, a gate electrode above the first active pattern, and overlapping the first channel region, a first storage capacitor electrode above the gate electrode, and overlapping the gate electrode, a second active pattern at a layer above the first storage capacitor electrode, and including a second channel region, a first gate line above the second active pattern, and overlapping the second channel region, and a blocking pattern between the first channel region and the first gate line in a plan view.
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公开(公告)号:US20220246087A1
公开(公告)日:2022-08-04
申请号:US17536560
申请日:2021-11-29
Applicant: Samsung Display Co., Ltd.
Inventor: KEUNWOO KIM , MEEJAE KANG , HANBIT KIM , DO KYEONG LEE , JAEHWAN CHU
Abstract: A pixel includes a light emitting element, a driving switching element and a first compensation switching element and a second compensation switching element. The driving switching element is which applies a driving current to the light emitting element. The first compensation switching element and the second compensation switching element are connected between a control electrode of the driving switching element and an output electrode of the driving switching element. The first compensation switching element and the second compensation switching element are connected to each other in series. The driving switching element is a P-type transistor. The first compensation switching element is an N-type transistor. The second compensation switching element is a P-type transistor.
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公开(公告)号:US20210367209A1
公开(公告)日:2021-11-25
申请号:US17228586
申请日:2021-04-12
Applicant: Samsung Display Co., Ltd.
Inventor: KEUNWOO KIM , HYENA KWAK , TAEWOOK KANG , JIYEONG SHIN , JAESEOB LEE
IPC: H01L51/52
Abstract: A display device includes: a base substrate including a first polymeric film; an active pattern on the base substrate and including a first channel region; and a first gate electrode overlapping the first channel region, wherein the first polymeric film has a first thickness in a first area overlapping the first channel region and a second thickness, which is smaller than the first thickness, in a second area different from the first area.
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公开(公告)号:US20210335953A1
公开(公告)日:2021-10-28
申请号:US17079765
申请日:2020-10-26
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: KEUNWOO KIM , HYENA KWAK , SANGSUB KIM , HANBIT KIM
IPC: H01L27/32 , G09G3/3266 , G09G3/3275 , G09G3/3233
Abstract: A pixel includes: a driving transistor including a semiconductor layer and a gate electrode; and a compensation transistor connected to the gate electrode and the semiconductor layer of the driving transistor, wherein the first thin-film transistor includes: a first sub-transistor including a first gate electrode receiving a first scan signal having a first voltage level during a period; and a second sub-transistor connected to the first sub-transistor in parallel and comprising a second gate electrode receiving a second scan signal having a second voltage level that is an inverted level of the first voltage level during the same period.
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