公开(公告)号：US20210175917A1

公开(公告)日：2021-06-10

申请号：US16998740

申请日：2020-08-20

Applicant: Silicon Laboratories Inc.

Inventor： Arup Mukherji ,  Vitor Pereira ,  Jeffrey A. Tindle ,  Mustafa H. Koroglu ,  Terry Lee Dickey

IPC: H04B1/16 ,  H04B1/18

Abstract: A wireless device including a receiver circuit coupled to a radio frequency receiver node, a frequency selective attenuator including an inductor and a first capacitor coupled in series to the radio frequency receiver node, and a second capacitor coupled in parallel with the first capacitor. The first capacitor has a first capacitance based on a blocker frequency and the second capacitor has a second capacitance that linearizes the frequency selective attenuator. A method of linearizing a frequency selective attenuator including detecting presence of a blocker signal, activating and programming a capacitor of the frequency selective attenuator to reduce a strength of the blocker signal, determining a frequency difference between the blocker signal and a receive frequency, and coupling a second capacitor to the frequency selective attenuator to linearize the frequency selective attenuator when the frequency difference is no more than an attenuation threshold.

公开(公告)号：US10536115B2

公开(公告)日：2020-01-14

申请号：US15724714

申请日：2017-10-04

Applicant: SILICON LABORATORIES INC.

Inventor： Tiago Marques ,  Vitor Pereira

IPC: H03B5/36 ,  H03F3/72

Abstract: A crystal driver integrated circuit with external oscillation signal amplitude control including an amplifier core, an input pin and an output pin, an adjustable capacitor, and a controller. The controller operates the amplifier core in any one of multiple operating modes including an oscillator mode and a bypass mode. During the bypass mode, the controller disables the amplifier core and adjusts the adjustable capacitor so that an amplitude of an oscillation signal received via the input pin from an external oscillator has a target amplitude. The external oscillation signal may be capacitively coupled for capacitive voltage division or directly coupled for impedance attenuation. An available voltage may be provided as a source voltage to the external oscillator via the output pin. An internal voltage regulator and/or switch may be included to re-provision the output pin to provide the source voltage during the bypass mode.

公开(公告)号：US09258596B2

公开(公告)日：2016-02-09

申请号：US14195575

申请日：2014-03-03

Applicant: Silicon Laboratories Inc.

Inventor： Vitor Pereira ,  Pascal Blouin ,  David LeGoff ,  Frederic Nicolas

IPC: H04N21/426 ,  H04N21/438 ,  H04N21/462 ,  H04N21/61 ,  H04N5/455 ,  H04N5/268

CPC classification number: H04N5/46 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/49113 ,  H01L2225/06562 ,  H04N5/268 ,  H04N5/455 ,  H04N21/42615 ,  H04N21/4263 ,  H04N21/42676 ,  H04N21/4382 ,  H04N21/4383 ,  H04N21/4622 ,  H04N21/6112 ,  H04N21/6118 ,  H04N21/6143 ,  H01L2924/00014

Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.

Abstract translation: 在一种形式中，用于多模式接收器的多芯片模块包括MCM衬底和第一和第二解调器管芯。 MCM衬底具有第一和第二卫星输入端口，第一和第二地面/电缆输入端口以及第一和第二传输流端口。 第一解调器管芯具有耦合到MCM衬底的第一卫星输入端口的卫星端口，耦合到MCM衬底的第一地面/电缆输入端口的地面/电缆端口，以及耦合到第一和第二传输流端口的第一和第二传输流端口 和MCM基板的第二传输流端口。 第二解调器管芯具有耦合到MCM衬底的第二卫星输入端口的卫星端口，耦合到MCM衬底的第二地面/电缆输入端口的地面/电缆端口，以及耦合到第一和第二传输流端口的第一和第二传输流端口 和MCM基板的第二传输流端口。

公开(公告)号：US20150126128A1

公开(公告)日：2015-05-07

申请号：US14575391

申请日：2014-12-18

Applicant: Silicon Laboratories Inc.

Inventor： John B. Youngblood ,  Guner Arslan ,  J.A. Bolton ,  Trenton J. Grale ,  Vitor Pereira ,  Jeffrey A. Tindle ,  David S. Trager ,  Yan Zhou

IPC: H04B15/00

CPC classification number: H04B15/00

Abstract: Die-to-die communication links for receiver integrated circuit dies within multi-die systems and related methods are disclosed for radio frequency (RF) receivers. The disclosed embodiments provide die-to-die communication links that allow for direct communication of operating parameters between receiver integrated circuit dies and other integrated circuit dies within a multi-die system so that the operation of receive path circuitry can be adjusted without requiring intervention from an external host processor integrated circuit. A variety of operating parameter information can be communicated through the die-to-die communication links so that the integrated circuit dies can quickly adjust to changing signal conditions without requiring intervention by the external host processor integrated circuit.

Abstract translation: 针对射频（RF）接收机公开了用于多芯片系统内的接收机集成电路管芯的模 - 模通信链路和相关方法。 所公开的实施例提供了允许在多管芯系统内的接收器集成电路管芯与其他集成电路管芯之间的操作参数的直接通信的管芯到管芯通信链路，使得可以调整接收路径电路的操作，而无需干预 外部主机处理器集成电路。 可以通过管芯到管芯通信链路传送各种操作参数信息，使得集成电路管芯可以快速地适应不断变化的信号条件，而不需要外部主机处理器集成电路的干预。