公开(公告)号：US20150271494A1

公开(公告)日：2015-09-24

申请号：US14661711

申请日：2015-03-18

Applicant: Texas Instruments Incorporated

Inventor： Hetul Sanghvi ,  Mihir Narendra Mody ,  Niraj Nandan ,  Mahesh Madhukar Mehendale ,  Subrangshu Das ,  Dipan Kumar Mandal ,  Pavan Venkata Shastry

IPC: H04N19/115 ,  G06F13/28 ,  H04N19/423

CPC classification number: H04N19/115 ,  G06F13/28 ,  H04N19/423

Abstract: A low power video hardware engine is disclosed. The video hardware engine includes a video hardware accelerator unit. A shared memory is coupled to the video hardware accelerator unit, and a scrambler is coupled to the shared memory. A vDMA (video direct memory access) engine is coupled to the scrambler, and an external memory is coupled to the vDMA engine. The scrambler receives an LCU (largest coding unit) from the vDMA engine. The LCU comprises N×N pixels, and the scrambler scrambles N×N pixels in the LCU to generate a plurality of blocks with M×M pixels. N and M are integers and M is less than N.

Abstract translation: 公开了一种低功率视频硬件引擎。 视频硬件引擎包括视频硬件加速器单元。 共享存储器耦合到视频硬件加速器单元，并且加扰器耦合到共享存储器。 vDMA（视频直接存储器访问）引擎耦合到加扰器，并且外部存储器耦合到vDMA引擎。 加扰器从vDMA引擎接收LCU（最大编码单元）。 LCU包括N×N个像素，扰频器对LCU中的N×N个像素进行加扰，以产生具有M×M个像素的多个块。 N和M是整数，M小于N.