METHOD FOR DRIVING A DISPLAY PANEL AND DISPLAY DEVICE

    公开(公告)号:US20240331636A1

    公开(公告)日:2024-10-03

    申请号:US18735048

    申请日:2024-06-05

    CPC classification number: G09G3/3233 G09G3/3266 G09G2320/0247 G09G2320/10

    Abstract: Provided are a method for driving a display panel, the method comprises a plurality of picture update periods, wherein at least one of the plurality of picture update periods comprises a first data write stage, a second data write stage, and a data retention stage; at least one of the first data write stage precedes at least one of the second data write stage; at the first data write stage, a gate scanning signal is provided for and a first data voltage is written to a pixel unit; at the second data write stage, the gate scanning signal is provided for and a second data voltage is written to the pixel unit, wherein theoretical brightness corresponding to the first data voltage is greater than theoretical brightness corresponding to the second data voltage.

    DISPLAY PANEL AND DISPLAY APPARATUS
    32.
    发明公开

    公开(公告)号:US20240237409A9

    公开(公告)日:2024-07-11

    申请号:US18402044

    申请日:2024-01-02

    Abstract: Provided are display panels and display apparatus. The display panel includes a driving array layer including a pixel circuit and a driving circuit configured to provide a control signal to the pixel circuit. The pixel circuit includes first and third transistors. The driving circuit includes second and fourth transistors. The first to fourth transistors include an active layer including silicon, an active layer including oxide semiconductor, an active layer including oxide semiconductor, and an active layer including silicon. The first and the third transistors are switching transistors of the pixel circuit, |W1/L1-W4/L4| 5*|W2/L2-W3/L3|; or the first and third transistors are a switching transistor and a driving transistor of the pixel circuit, respectively, 5*|W1/L1-W4/L4|

    DISPLAY PANEL AND DISPLAY APPARATUS
    33.
    发明公开

    公开(公告)号:US20240138191A1

    公开(公告)日:2024-04-25

    申请号:US18401975

    申请日:2024-01-02

    Abstract: Provided are display panels and display apparatus. The display panel includes a driving array layer including a pixel circuit and a driving circuit configured to provide a control signal to the pixel circuit. The pixel circuit includes a first capacitor and a first transistor including an active layer including silicon. The driving circuit includes a second capacitor and a second transistor including an active layer including oxide semiconductor. In a direction perpendicular to a plane of the display panel, the first capacitor partially overlaps the first transistor, and the second capacitor does not overlap the second transistor; or in a direction perpendicular to a plane of the display panel, an area of a region where the first capacitor overlaps the first transistor is greater than an area of a region where the second capacitor overlaps the second transistor.

    PIXEL DRIVING CIRCUIT, DISPLAY PANEL AND DRIVING METHOD

    公开(公告)号:US20210150985A1

    公开(公告)日:2021-05-20

    申请号:US17164019

    申请日:2021-02-01

    Abstract: Provided are a pixel driving circuit, a display panel and a driving method. The pixel driving circuit includes a drive transistor, a data write module, a light emission control module, a threshold compensation module and a bias adjustment module. The control terminal of the drive transistor is connected to the first node. The first terminal of the drive transistor is connected to a third node. The second terminal of the drive transistor is connected to a second node. The light emission control module is connected in series with the drive transistor and connected in series with a light-emitting element. The threshold compensation module is connected in series between the control terminal of the drive transistor and the second terminal of the drive transistor. The first terminal of the bias adjustment module is connected to a bias signal terminal. The second terminal of the bias adjustment module is connected to the second terminal of the drive transistor.

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