Reducing Local Mismatch of Devices Using Cryo-Implantation
    31.
    发明申请
    Reducing Local Mismatch of Devices Using Cryo-Implantation 审中-公开
    减少使用冷冻植入设备的局部不匹配

    公开(公告)号:US20110039390A1

    公开(公告)日:2011-02-17

    申请号:US12784348

    申请日:2010-05-20

    IPC分类号: H01L21/336

    摘要: A method of forming an integrated circuit includes providing a semiconductor wafer, and forming a metal-oxide-semiconductor (MOS) device. The step of forming the MOS device includes forming a gate stack on the semiconductor wafer, and performing a cryo-implantation to form an implantation region adjacent the gate stack at a wafer temperature lower than 0° C. The step of performing the cryo-implantation is selected from the group consisting essentially of implanting the semiconductor wafer to form a pre-amorphized implantation (PAI) region; implanting the semiconductor wafer to form a lightly-doped source/drain region; implanting the semiconductor wafer to form a pocket/halo region; implanting the semiconductor wafer to form a deep source/drain region, and combinations thereof

    摘要翻译: 形成集成电路的方法包括提供半导体晶片和形成金属氧化物半导体(MOS)器件。 形成MOS器件的步骤包括在半导体晶片上形成栅极堆叠,并且在低于0℃的晶片温度下进行低温注入以形成与栅叠层相邻的注入区。进行低温注入 选自基本上由植入半导体晶片以形成预非晶化植入(PAI)区域的组; 注入半导体晶片以形成轻掺杂的源/漏区; 注入半导体晶片以形成口/晕区域; 注入半导体晶片以形成深源极/漏极区及其组合