摘要:
A method for driving a plasma display panel is provided in which initialization is performed securely and the background light emission is reduced. As an operation for the initialization, an obtuse waveform pulse is applied to all cells three times. In the first obtuse waveform pulse application, discharge is generated only in the previously lighted cell, so that the wall voltage thereof approaches the wall voltage in the previously unlighted cell. In the second obtuse waveform pulse application, discharge is generated in the previously lighted cell and in the previously unlighted cell, so that the wall voltage in these cells changes to a value within an appropriate range. In the third obtuse waveform pulse application, discharge is generated in the previously lighted cell and in the previously unlighted cell, so that the wall voltage of these cells changes to a preset value.
摘要:
A method for setting an applied voltage in a plasma display panel is provided, in which a driving voltage margin is increased. A charge adjustment is performed by generating a discharge for changing a wall charge quantity without changing a polarity of the charging before addressing. In a coordinates space describing the relationship between the effective voltage between the first electrodes and the effective voltage between the second electrodes, a voltage range (Vt closed curve) that can generate a microdischarge for the charge adjustment is determined, and a waveform of an increasing voltage that is applied to the discharge cell is determined in accordance with a Vt closed curve.
摘要:
A method and device for driving a display panel are provided in which power consumption due to interelectrode capacitance in the addressing period is reduced with less number of components in a driving circuit. Four switches 41-44 are provided for each of plural data electrodes. The four switches 41-44 control open and close of a current path p1 from a bias potential line 81 to the data electrode A, a current path p2 from a capacitor 55 to the data electrode A, a current path p3 from the data electrode A to the capacitor 55, and a current path p4 from the data electrode A to the ground potential line 82.