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    Methods of operating integrated circuit memory devices having nonvolatile single transistor unit cells therein
    41.
    发明授权
    Methods of operating integrated circuit memory devices having nonvolatile single transistor unit cells therein 有权
    操作其中具有非易失性单晶体管单元电池的集成电路存储器件的方法

    公开(公告)号：US5978253A

    公开(公告)日：1999-11-02

    申请号：US191891

    申请日：1998-11-13

    申请人： Keun-Ho Lee ,  Chang-Hoon Choi

    发明人： Keun-Ho Lee ,  Chang-Hoon Choi

    IPC分类号： H01L27/10 ,  H01L29/423 ,  H01L29/78 ,  G11C11/22

    CPC分类号： H01L29/42324 ,  H01L29/42328 ,  H01L29/78391 ,  G11C11/223

    摘要： Integrated circuit memory devices include a gate oxide insulating layer on a surface of a semiconductor substrate containing a bulk region of first conductivity type and spaced source and drain regions of second conductivity type therein extending to the surface. First and second separate control gates are also preferably provided in each unit cell and extend opposite the surface. A ferroelectric insulating layer is provided between the first and second control gates and acts as a nonvolatile data storage medium when it is polarized in a predetermined state. A floating gate is also provided having a preferred C-shape when viewed in transverse cross-section. In particular, the floating gate is provided to have a first extension disposed between the first control gate and the first electrically insulating layer and a second extension disposed between the first control gate and the ferroelectric insulating layer. The first control gate is also electrically insulated from the floating gate by a second electrically insulating layer disposed between the first control gate and the first extension and a third electrically insulating layer disposed between the first control gate and the second extension. According to a preferred aspect of the present invention, the thickness of the second electrically insulating is greater than a thickness of the third electrically insulating layer, however, the dielectric constant of the third electrically insulating layer is preferably greater than the dielectric constant of the second electrically insulating layer.

    摘要翻译： 集成电路存储器件包括在半导体衬底的表面上的栅极氧化物绝缘层，该半导体衬底包含第一导电类型的主体区域，并且在其中延伸到表面的间隔的第二导电类型的源极和漏极区域。 第一和第二分离控制栅极也优选地设置在每个单元电池中并且与表面相对延伸。 铁电绝缘层设置在第一和第二控制栅极之间，并且在预定状态下极化时用作非易失性数据存储介质。 当在横截面中观察时，还提供具有优选C形的浮动栅极。 特别地，浮置栅极被设置为具有设置在第一控制栅极和第一电绝缘层之间的第一延伸部和设置在第一控制栅极和铁电绝缘层之间的第二延伸部。 第一控制栅极还通过设置在第一控制栅极和第一延伸部之间的第二电绝缘层与浮置栅极电绝缘，以及设置在第一控制栅极和第二延伸部之间的第三电绝缘层。 根据本发明的优选方面，第二电绝缘层的厚度大于第三电绝缘层的厚度，然而，第三电绝缘层的介电常数优选地大于第二电绝缘层的介电常数 电绝缘层。