公开(公告)号：US20060110899A1

公开(公告)日：2006-05-25

申请号：US11029808

申请日：2005-01-04

Applicant: Konstantin Bourdelle ,  Fabrice Letertre ,  Bruce Faure ,  Christophe Morales ,  Chrystel Deguet

Inventor： Konstantin Bourdelle ,  Fabrice Letertre ,  Bruce Faure ,  Christophe Morales ,  Chrystel Deguet

IPC: H01L21/20

CPC classification number: H01L21/76254

Abstract: Improved fabrication processes for manufacturing GeOI type wafers are disclosed. In an implementation, a method for fabricating a germanium on insulator wafer includes providing a source substrate having a surface, at least a layer of germanium and a weakened area. The weakened area is located at a predetermined depth in the germanium layer of the source substrate and is generally parallel to the source substrate surface. The technique also includes providing a germanium oxynitride layer in or on the source substrate, bonding the source substrate surface to a handle substrate to form a source-handle structure, and detaching the source substrate from the source-handle structure at the weakened area of the source substrate to create the germanium on insulator wafer having, as a surface, a useful layer of germanium.

Abstract translation: 公开了用于制造GeOI型晶片的改进的制造工艺。 在一个实施方案中，用于制造绝缘体上硅晶片的方法包括提供具有表面，至少一层锗和弱化区域的源极衬底。 弱化区域位于源极衬底的锗层中的预定深度处，并且大致平行于源极衬底表面。 该技术还包括在源极衬底中或其上提供氮氧化锗层，将源极衬底表面接合到处理衬底上以形成源极 - 手柄结构，以及在源极 - 手柄结构的弱化区域处将源极衬底与源极 - 源衬底以形成绝缘体上的晶圆，其具有作为表面的锗的有用层。

公开(公告)号：US20050245049A1

公开(公告)日：2005-11-03

申请号：US11179713

申请日：2005-07-11

Applicant: Takeshi Akatsu ,  Nicolas Daval ,  Nguyet-Phuong Nguyen ,  Olivier Rayssac ,  Konstantin Bourdelle

Inventor： Takeshi Akatsu ,  Nicolas Daval ,  Nguyet-Phuong Nguyen ,  Olivier Rayssac ,  Konstantin Bourdelle

IPC: H01L21/762 ,  H01L21/30 ,  H01L21/46

CPC classification number: H01L21/76254

Abstract: Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface; coimplanting two different atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer; bonding the free surface of the second layer to a host wafer; and supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer. Advantageously, the donor wafer includes a SiGe layer, and the co-implantation of atomic species is conducted according to implantation parameters adapted to enable a first species to form the zone of weakness in the SiGe layer, and to enable a second species to provide a concentration peak located beneath the zone of weakness in the donor wafer to thus minimize surface roughness resulting from detachment at the zone of weakness.

Abstract translation: 描述形成半导体结构的方法。 在一个实施例中，该技术包括提供在第一层上具有第一半导体层和第二半导体层并具有自由表面的施主晶片; 通过第二层的自由表面共同植入两种不同的原子物质，以形成第一层中的弱区; 将第二层的自由表面粘合到主晶片; 并且在弱化区域提供能量以分散包含主晶片，第二层和第一层的一部分的半导体结构。 有利地，施主晶片包括SiGe层，并且根据适于使第一种类形成SiGe层中的弱点区域的植入参数来进行原子物质的共同注入，并且使得第二物质能够提供 浓度峰位于供体晶片中的弱点之下，从而使得在弱化区分离导致的表面粗糙度最小化。