公开(公告)号：US11430708B2

公开(公告)日：2022-08-30

申请号：US17092193

申请日：2020-11-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/31

Abstract: A package structure and a circuit layer structure are provided in the present disclosure. The package structure includes a wiring structure, a first electronic device, a second electronic device and at least one dummy trace. The wiring structure includes a plurality of interconnection traces. The first electronic device and the second electronic device are disposed on the wiring structure, and electrically connected to each other through the interconnection traces. The dummy trace is adjacent to the interconnection traces. A mechanical strength of the at least one dummy trace is less than a mechanical strength of one of the interconnection traces.

公开(公告)号：US11362052B2

公开(公告)日：2022-06-14

申请号：US16732071

申请日：2019-12-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Chang Lee ,  Wen-Long Lu

IPC: H01L23/00 ,  H01L23/31 ,  H01L25/065

Abstract: A semiconductor device package includes a first electronic component having a first surface and a second surface opposite the first surface. The semiconductor device package further includes a first pad disposed on the first surface of the first electronic component. The first pad has a first surface facing away from the first surface of the first electronic component, a second surface opposite the first surface of the first pad, and a lateral surface extended between the first surface of the first pad and the second surface of the first pad. The semiconductor device package further includes a second pad disposed on the first surface of the first pad. The second pad has a first surface facing away from the first surface of the first pad, a second surface opposite the first surface of the second pad, and a lateral surface extended between the first surface of the second pad and the second surface of the second pad. A width of the first surface of the second pad is greater than a width of the second surface of the second pad. A method of manufacturing a semiconductor device package is also disclosed.

公开(公告)号：US11296002B2

公开(公告)日：2022-04-05

申请号：US16734023

申请日：2020-01-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/31 ,  H01L23/66 ,  H01L21/56 ,  H01L23/00

Abstract: A semiconductor device package includes a substrate, a first electronic component and a first encapsulant. The substrate has a first surface and a second surface opposite to the first surface. The first electronic component is disposed on the first surface of the substrate. The first encapsulant is disposed on the first surface of the substrate and covers the first electronic component. The first encapsulant has a first surface facing away the first surface of the substrate and includes a recess at an edge of the first surface of the first encapsulant.

公开(公告)号：US11271312B2

公开(公告)日：2022-03-08

申请号：US16575123

申请日：2019-09-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01Q9/04 ,  H01L23/538 ,  H01L23/66 ,  H01L23/00 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device package includes a circuit layer and a first antenna structure. The circuit layer includes a first surface, and a second surface opposite to the first surface. The first antenna structure is disposed on the first surface and electrically connected to the circuit layer. The first antenna structure includes a first patch, a second patch, a third patch, a first dielectric layer and a second dielectric layer. The second patch is disposed on the first patch. The first dielectric layer has a first dielectric constant (Dk), and is disposed between the first patch and the second patch. The third patch is disposed on the second patch. The second dielectric layer has a second dielectric constant and is disposed between the second patch and the third patch. The first dielectric constant is smaller than the second dielectric constant.

公开(公告)号：US11217520B2

公开(公告)日：2022-01-04

申请号：US16709641

申请日：2019-12-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00

Abstract: A wiring structure includes a first dielectric layer, a first circuit layer, a second dielectric layer and a conductive via. The first dielectric layer defines at least one through hole. The first circuit layer is disposed on the first dielectric layer. The second dielectric layer is disposed on the first dielectric layer to cover the first circuit layer, wherein a first portion of the second dielectric layer is disposed in the through hole of the first dielectric layer. The conductive via extends through the first portion of the second dielectric layer in the through hole of the first dielectric layer, and is electrically isolated from the first circuit layer.

公开(公告)号：US11215762B2

公开(公告)日：2022-01-04

申请号：US15998408

申请日：2018-08-15

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Huang-Hsien Chang ,  Po Ju Wu ,  Yu Cheng Chen ,  Wen-Long Lu

IPC: G02B6/44 ,  G02B6/36 ,  G02B6/42

Abstract: An optical device package includes a semiconductor substrate, and an optical device. The semiconductor substrate has a first surface, a second surface different in elevation from the first surface, and a profile connecting the first surface to the second surface. A surface roughness of the profile is greater than a surface roughness of the second surface. The optical device is disposed on the second surface and surrounded by the profile.

公开(公告)号：US11139247B2

公开(公告)日：2021-10-05

申请号：US16354155

申请日：2019-03-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/48 ,  H01L23/532 ,  H01L23/522 ,  H01L23/528 ,  H01L25/10 ,  H01L23/00

Abstract: An interconnection structure includes a first dielectric layer and a second dielectric layer. The second dielectric layer is disposed on the first dielectric layer. The second dielectric layer has a first surface and a second surface, both facing toward the first dielectric layer. The first surface of the second dielectric layer is recessed from the second surface of the second dielectric layer and defines a recess. A portion of the first dielectric layer is disposed within the recess.

公开(公告)号：US11088101B2

公开(公告)日：2021-08-10

申请号：US16443574

申请日：2019-06-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/485 ,  H01L23/00 ,  H01L21/768 ,  H01L23/31

Abstract: A semiconductor package structure includes a semiconductor die having an active surface, a conductive bump electrically coupled to the active surface, and a dielectric layer surrounding the conductive bump. The conductive bump and the dielectric layer form a planar surface at a distal end of the conductive bump with respect to the active surface. The distal end of the conductive bump is wider than a proximal end of the conductive bump with respect to the active surface.

公开(公告)号：US11063015B2

公开(公告)日：2021-07-13

申请号：US16521531

申请日：2019-07-24

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L21/00 ,  H01L23/00 ,  H01L21/762

Abstract: A semiconductor device package includes a first substrate having a first surface, a first electrical contact disposed on the first surface of the first substrate, a second substrate having a second surface facing the first surface of the first substrate, and a second electrical contact disposed on the second surface of the second substrate. The first electrical contact has a base portion and a protrusion portion. The second electrical contact covers at least a portion of the protrusion portion of the first electrical contact. The second electrical contact has a first surface facing the first substrate and a second surface facing the second substrate. A slope of a first interface between the second electrical contact and the protrusion portion of the first electrical contact adjacent to the first surface of the second electrical contact is substantially the same as a slope of a second interface between the second electrical contact and the protrusion portion of the first electrical contact adjacent to the second surface of the second electrical contact. A method of manufacturing a semiconductor device package is also disclosed.

公开(公告)号：US11056446B2

公开(公告)日：2021-07-06

申请号：US16547539

申请日：2019-08-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor package device includes a wiring structure, a semiconductor chip and an encapsulant. The semiconductor chip is electrically connected to the wiring structure. The encapsulant is disposed on the wiring structure and covers the semiconductor chip. A roughness (Ra) of a surface of the encapsulant is about 5 nm to about 50 nm.