Display panel and driving method thereof, and display apparatus

    公开(公告)号:US11232747B2

    公开(公告)日:2022-01-25

    申请号:US16982024

    申请日:2020-04-02

    Abstract: The present disclosure provides a display panel and a driving method thereof, and a display apparatus. The display panel includes: a plurality of sub-pixels arranged in an array, a plurality of data lines, and a plurality of compensation detection lines, wherein each data line is coupled with sub-pixels in one column; sub-pixels in every three columns serve as one first sub-pixel group, and each first sub-pixel group corresponds to two compensation detection lines which include a first detection line and a second detection line; and in each first sub-pixel group, sub-pixels in the first column are coupled with the first detection line, sub-pixels in the third column are coupled with the second detection line, and sub-pixels in the second column are alternatively coupled with the first detection line and the second detection line.

    Shift register unit, gate drive circuit, display panel and display device

    公开(公告)号:US11200861B2

    公开(公告)日:2021-12-14

    申请号:US17000219

    申请日:2020-08-21

    Abstract: A shift register unit includes a pull-down sustaining sub-circuit and a pull-down sub-circuit. The pull-down sustaining sub-circuit includes: a first transistor having a control electrode configured to input a pull-down sustaining signal, a first electrode connected to a first power signal terminal, and a second electrode connected to a pull-down node; a first capacitor; and a second transistor having a control electrode connected to an input signal terminal. The pull-down sub-circuit includes: a third transistor having a control electrode connected to the first terminal of the first capacitor, a first electrode connected to a pull-up node, and a second electrode connected to the second power signal terminal; a fourth transistor having a control electrode connected to the first terminal of the first capacitor, a first electrode connected to an output sub-circuit, and a second electrode connected to the second power signal terminal.

    ARRAY SUBSTRATE AND TESTING METHOD THEREOF

    公开(公告)号:US20210256889A1

    公开(公告)日:2021-08-19

    申请号:US17262775

    申请日:2020-06-02

    Abstract: An array substrate and a testing method thereof are provided. The array substrate includes a plurality of clock signal lines and a plurality of testing terminals. As at least two of the plurality of clock signal lines may be connected to a same testing terminal, as compared with the arrangement of the related art in which one clock signal line is connected to one testing terminal, the array substrates provided by the embodiments of the present disclosure only need to have less testing terminals, and correspondingly, the testing device that is connected to the testing terminals of the array substrate provided by the embodiments of the present disclosure may contain less pins. Therefore, the testing device can have a relatively low production cost and a relatively small volume.

    ARRAY SUBSTRATE AND FABRICATING METHOD THEREOF, DISPLAY PANEL, AND DISPLAY APPARATUS

    公开(公告)号:US20210233982A1

    公开(公告)日:2021-07-29

    申请号:US16638556

    申请日:2019-09-04

    Abstract: An array substrate includes a base substrate (1); a driving transistor (2) on the base substrate (1); an insulating layer (3) on the driving transistor (2), the insulating layer (3) comprising a via hole above a first electrode (21) of the driving transistor (2); a conductive portion (4) on the insulating layer (3); and a light emitting device (6) on the conductive portion (4) and electrically connected to the conductive portion (4). The conductive portion (4) may be electrically connected to the first electrode (21) of the driving transistor (2) through the via hole. The light emitting device (6) may be above the via hole, and an orthographic projection of the light emitting device (6) on the base substrate (1) may cover an orthographic projection of the via hole on the base substrate (1).

    Array Substrate and Detection Method Thereof, and Display Panel

    公开(公告)号:US20210225955A1

    公开(公告)日:2021-07-22

    申请号:US16645088

    申请日:2019-09-12

    Abstract: An array substrate and a detection method thereof, and a display panel are disclosed. The array substrate includes a plurality of subpixels and a plurality of detection line structures. The plurality of subpixels are arranged in an array of a plurality of rows and a plurality of columns along a first direction and a second direction. Each of the plurality of detection line structures includes at least one first detection line extending along the first direction; adjacent (n)th row and (n+1)th row of subpixels in the array form a subpixel row group, one detection line structure is provided between the (n)th row and (n+1)th row of subpixels in each subpixel row group, and the detection line structure is configured to be connected to the (n)th row and (n+1)th row of subpixels and detect electrical characteristics of first transistors or light-emitting elements in the subpixels.

    Method and device for detecting deficiency of external compensation line, and display module

    公开(公告)号:US10762813B2

    公开(公告)日:2020-09-01

    申请号:US15988446

    申请日:2018-05-24

    Inventor: Can Yuan

    Abstract: The present disclosure provides a method and a device for detecting an external compensation line and a display module. The method includes steps of: within a resetting time period of each detection stage, applying a resetting voltage to the external compensation line and entering a detection time period after a resetting duration; and within the detection time period of each detection stage, controlling the external compensation line to be in a floating state, applying a data voltage to a data line, applying a power source voltage to a power source voltage input end, applying a data write-in control voltage to a data write-in control end, applying an external compensation control voltage to an external compensation control end, detecting a voltage across the external compensation line after a detection duration, and determining whether or not there is a short circuit for the external compensation line in accordance with the voltage across the external compensation line.

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