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公开(公告)号:US11003001B2
公开(公告)日:2021-05-11
申请号:US15801590
申请日:2017-11-02
发明人: Haifeng Liu , Xiaoye Ma , Xiping Wang
IPC分类号: G02F1/1333 , G02F1/16755 , G02F1/1335 , G02F1/153
摘要: A method for manufacturing a display substrate, a method for manufacturing a display panel, and a display panel are disclosed. The method for manufacturing a display substrate includes: providing a base substrate, in which the base substrate includes a first surface and a second surface which are opposite to each other; reducing a thickness of the base substrate from the first surface by way of a thinning process; and forming a first protective layer on the first surface obtained after thinning by a tape casting method.
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公开(公告)号:US10923060B2
公开(公告)日:2021-02-16
申请号:US16300977
申请日:2018-03-20
发明人: Ruifang Du , Xiping Wang , Rui Ma , Xiaoye Ma
IPC分类号: G09G3/36 , G09G3/3266
摘要: A shift register unit, a shift register circuit and a display panel is provided. The shift register unit includes: an input circuit configured to transmit a power signal to the pull-up node; an output circuit configured to transmit a clock signal to the signal output terminal; a reset circuit configured to transmit a reference signal to the pull-up node and the signal output terminal; a first pull-down control circuit configured to transmit the reference signal to the pull-down control node and the pull-down node; a second pull-down control circuit configured to transmit the power signal to the pull-down control node and the pull-down node; and a pull-down circuit configured to transmit the reference signal to the pull-up node and the signal output terminal.
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公开(公告)号:US20210013231A1
公开(公告)日:2021-01-14
申请号:US16066660
申请日:2017-10-19
发明人: Xiaofang Gu , Xiaoye Ma , Xiping Wang
摘要: The present disclosure relates to an array substrate, a method for manufacturing the same, a display panel, and a display device. The array substrate includes: a gate metal layer, disposed on the substrate and the gate metal layer including a grounding wire located in the peripheral region; a gate insulating layer, at least covering the gate metal layer; and a conductive layer structure, disposed over the gate insulating layer and including an auxiliary grounding wire located in the peripheral region, wherein the auxiliary grounding wire is connected to the grounding wire. The present disclosure can prevent ESD more effectively.
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44.
公开(公告)号:US10553140B2
公开(公告)日:2020-02-04
申请号:US15759029
申请日:2017-09-22
发明人: Ruifang Du , Xiping Wang , Rui Ma , Xiaoye Ma
IPC分类号: G09G3/20
摘要: Embodiments of the present disclosure invention disclose an inversion control circuit, a method for driving the same, a display panel, and a display device, and the inversion control circuit includes: an input circuit, a switching control circuit, a first output circuit, and a second output circuit. In the inversion control circuit according to the embodiment of the present disclosure, the four circuits cooperate with each other to thereby enable the potential of an input signal end to be opposite to the potential of an inverted signal output end, so that when the inversion control circuit is applicable to the display panel, a clock signal is used as an input signal, and an output signal is a clock signal opposite in phase.
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公开(公告)号:US10535318B2
公开(公告)日:2020-01-14
申请号:US16090431
申请日:2018-04-11
发明人: Ruifang Du , Xiaoye Ma
IPC分类号: G09G3/36 , G02F1/1362 , G02F1/1333 , G02F1/1343
摘要: The present disclosure is related to an array substrate. The array substrate may include a plurality of gate lines, a plurality of data lines intersecting the gate lines, and a first gate driving circuit comprising a plurality of shift register circuits in a non-active area. The gate lines and the data lines may define a plurality of sub-pixels in an active area and a plurality of dummy sub-pixels in the non-active area adjacent to the active area. The first gate driving circuit may be farther away from the active area than the plurality of the dummy sub-pixels. At least one of the dummy sub-pixels may include an auxiliary capacitor. A shift register circuit in the first gate driving circuit may be coupled to the auxiliary capacitor. The auxiliary capacitor may form at least a part of a bootstrap capacitor in the shift register circuit.
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46.
公开(公告)号:US20180275435A1
公开(公告)日:2018-09-27
申请号:US15801590
申请日:2017-11-02
发明人: Haifeng Liu , Xiaoye Ma , Xiping Wang
IPC分类号: G02F1/1333 , G02F1/1335
CPC分类号: G02F1/1333 , G02F1/133305 , G02F1/133528 , G02F2001/133325 , G02F2201/50
摘要: A method for manufacturing a display substrate, a method for manufacturing a display panel, and a display panel are disclosed. The method for manufacturing a display substrate includes: providing a base substrate, in which the base substrate includes a first surface and a second surface which are opposite to each other; reducing a thickness of the base substrate from the first surface by way of a thinning process; and forming a first protective layer on the first surface obtained after thinning by a tape casting method.
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公开(公告)号:US20190251928A1
公开(公告)日:2019-08-15
申请号:US16056912
申请日:2018-08-07
发明人: Ruifang Du , Tong Yang , Xiaoye Ma
IPC分类号: G09G5/00
摘要: Embodiments of the disclosure provide a gate driver, a display apparatus and a method for controlling the gate driver. The gate driver comprises a plurality of clock signal terminals; a controlling signal terminal; and N stages of cascaded gate driving circuits. Each of the N stages of cascaded gate driving circuits is configured to pull-up a voltage of an outputting terminal of the gate driving circuit according to a signal at the respective clock signal terminal, and to perform a noise reduction operation according to a signal at the controlling signal terminal. A controller is coupled with the clock signal terminals and the controlling signal terminal, and is configured to detect signals at the plurality of clock signal terminals, and to output a valid level signal to the controlling signal terminal in response to the signal at the clock signal terminal being abnormal.
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