公开(公告)号：US06269430B1

公开(公告)日：2001-07-31

申请号：US09342711

申请日：1999-06-29

Applicant: Chia-Hsin Chen ,  You-Ming Chiu ,  Jiin Lai

Inventor： Chia-Hsin Chen ,  You-Ming Chiu ,  Jiin Lai

IPC: G06F1200

CPC classification number: G06F12/0875 ,  G06F13/4243 ,  G06F2212/303

Abstract: A method for a CPU interface to control a writing process that writes data sent from a CPU to a memory. The CPU interface controls the writing process through steps mainly including receiving a write request and data from a CPU, sending a dummy request to the memory control circuit of the memory circuit, and then writing the data to a memory of the memory circuit. After the CPU interface receives a write request from the CPU, the CPU interface sends a dummy request to the memory control circuit to pre-charge and activate the designative memory page of the memory circuit before the data is sent to the memory circuit. Since the designative memory page is always pre-charged and activated while the data is received at the memory control circuit, the memory control circuit sends only a write command to the memory for writing the data to the memory without further pre-charging and activating the designative memory page. Therefore, the total number of clock cycles required for processing a write request is shortened.

Abstract translation: 一种CPU接口的方法，用于控制将从CPU发送到存储器的数据写入的写入过程。 CPU接口通过主要包括从CPU接收写入请求和数据，向存储器电路的存储器控​​制电路发送伪请求，然后将数据写入存储器电路的存储器的步骤来控制写入过程。 在CPU接口从CPU接收到写请求之后，CPU接口向存储器控制电路发送伪请求，以在数据被发送到存储器电路之前对存储器电路的指定存储器页进行预充电和激活。 由于在存储器控制电路中接收到数据时，指定存储器页面总是被预先充电并被激活，所以存储器控制电路仅将写入命令发送到存储器，用于将数据写入存储器，而无需进一步的预充电和激活 指定记忆页面。 因此，缩短了处理写请求所需的总时钟周期数。