Abstract:
Methods and arrangements are disclosed for secure single sign on to an operating system using only a power-on password. In many embodiments modified BIOS code prompts for, receives and verifies the power-on password. The power-on password is hashed and stored in a Platform Configuration Register of the Trusted Platform Module. In a setup mode, the trusted platform module encrypts the operating system password using the hashed power-on password. In a logon mode, the trusted platform module decrypts the operating system password using the hashed power-on password.
Abstract:
A trusted platform module (TPM) is a silicon chip that constitutes a secure encryption key-pair generator and key management device. A TPM provides a hardware-based root-of-trust contingent on the generation of the first key-pair that the device creates: the SRK (storage root key). Each SRK is unique, making each TPM unique, and an SRK is never exported from a TPM. Broadly contemplated herein is an arrangement for determining automatically whether a TPM has been replaced or cleared via loading a TPM blob into the TPM prior to the first time it is to be used (e.g. when a security-related software application runs). If the TPM blob loads successfully, then it can be concluded that the TPM is the same TPM that was used previously. If the TPM blob cannot be loaded, then corrective action will preferably take place automatically to configure the new TPM.
Abstract:
An atomizing nebulizer for dispensing a substance or medicament is described. The nebulizer is formed with a reservoir base releasably secured to an effluent vent cap that together capture a diffuser and integral dispersing baffle that are further formed with an uptake lumen or channel terminating with a nozzle jet. The diffuser dispersing baffle is positioned relative to the jet nozzle to optimize atomization of any of a number of such substances so as to maximize disbursement of the substance. The reservoir base also incorporates a pressurized fluid-accelerating inlet tube terminated with a metering orifice that cooperates with the nozzle jet when the inlet tube is received within the diffuser uptake lumen or channel. When so received, the nozzle jet axially registers proximate and superior to the orifice to establish a vacuum space that is in fluid communication with a capillary interstice established between the walls of the exterior of the inlet tube and the confronting interior surface of the diffuser lumen or channel. When a pressurized fluid is communicated through the lumen, the orifice, and into the vacuum space towards the nozzle jet, a vacuum develops in the vacuum space that, in combination with the capillary action of the interstice, draws the fluid proximate to the orifice and disperses it into droplets that are then entrained into a fluid stream to be further atomized upon impact with the baffle and then dispensed.
Abstract:
An embedded security subsystem, and method for implementing the same, which provide secure controllability of a data security device within a data processing system. The embedded security subsystem of the present invention includes a persistent enable flag for providing control access to the data security device, wherein the persistent enable flag is accessible only in response to a power-on reset cycle of the data processing system. The persistent enable flag is read-only accessible to runtime program instructions. A pending state change flag that is write accessible by runtime program instructions is utilized for setting an intended next state of the persistent enable flag such that control access to the data security device is enabled only during a subsequent power-on reset of said data processing system.
Abstract:
Referring to FIGS. 1 and 2, I/O control modules (IOCMs 25-29) have channels which communicate by way of timer buses (71, 72) and pin/status buses (75-77). Channels (86, 87) are partitioned by each timer bus (71, 72) into separate blocks of channels (86, 87) which are provided with access to different timebase values from timebase channels (80, 81) by their respective timer bus (71, 72), so there is no loss of resolution because each channel in a timer bus block (e.g. 86) can concurrently receive the same timebase value from its corresponding timer bus (71). Pin/status buses (75-77) allow simultaneity of control among the channels (e.g. 58) coupled to the same pin/status bus (e.g. 76). Pin/status buses (75-77) and timer buses (71, 72) can be independently partitioned.