MICROCODE CONFIGURABLE FREQUENCY CLOCK
    41.
    发明申请
    MICROCODE CONFIGURABLE FREQUENCY CLOCK 有权
    MICROCODE可配置频率时钟

    公开(公告)号:US20110010576A1

    公开(公告)日:2011-01-13

    申请号:US12886457

    申请日:2010-09-20

    IPC分类号: G06F1/04

    CPC分类号: G06F1/08

    摘要: A microcode configurable frequency clock that may be used to control the speed of high speed comparison in an operational optical transceiver. The frequency clock includes a memory and a logic circuit. The memory receives microcode generated data relating to the desired speed of comparison. The logic circuit is configured to receive an input clock signal and to produce an output clock signal by frequency dividing the input signal based on the microcode generated data. The output clock is used to control the speed of comparison in the optical transceiver.

    摘要翻译: 可用于控制在操作光收发器中的高速比较速度的微码可配置频率时钟。 频率时钟包括存储器和逻辑电路。 存储器接收与所需的比较速度有关的微码生成数据。 逻辑电路被配置为接收输入时钟信号并且通过基于微码产生的数据对输入信号进行分频来产生输出时钟信号。 输出时钟用于控制光收发器中的比较速度。

    EARLY SELF-VALIDATION OF PERSISTENT MEMORY DURING BOOT IN AN OPTICAL TRANSCEIVER
    42.
    发明申请
    EARLY SELF-VALIDATION OF PERSISTENT MEMORY DURING BOOT IN AN OPTICAL TRANSCEIVER 有权
    在光学收发器启动过程中早期记忆的自动验证

    公开(公告)号:US20100254710A1

    公开(公告)日:2010-10-07

    申请号:US12817091

    申请日:2010-06-16

    IPC分类号: H04B10/00

    CPC分类号: H04B10/40 G02B6/4246

    摘要: An operational optical transceiver configured to self-validate a boot image loaded from the persistent memory early in the boot process. The optical transceiver includes a persistent memory, a controller, and a system memory. The controller initializes the boot process and begins to load information from the persistent memory to the system memory. Next, the controller detects early in the boot process boot image verification data in the information being sent to the system memory. The controller then determines if the boot image verification data has an expected value. If the verification data includes the expected value, the controller continues the boot process. If the verification data does not include the expected value, the controller will retry the boot process a predetermined number of times and will enter a default operational state if the expected value is not detected while retrying the boot process the predetermined number of times.

    摘要翻译: 一种可操作的光收发器,被配置为在启动过程中早期自动验证从持久存储器加载的引导映像。 光收发器包括持久存储器,控制器和系统存储器。 控制器初始化引导过程,并开始将信息从永久存储器加载到系统内存。 接下来,控制器在引导过程中早期检测引导映像验证数据中发送给系统存储器的信息。 然后,控制器确定引导映像验证数据是否具有期望值。 如果验证数据包含预期值,则控制器继续启动进程。 如果验证数据不包括预期值,则控制器将重试引导进程预定次数,并且如果在重试引导进程预定次数时未检测到期望值,则将进入默认操作状态。

    Single operation per-bit memory access
    43.
    发明授权
    Single operation per-bit memory access 有权
    单次操作每位内存访问

    公开(公告)号:US07404068B2

    公开(公告)日:2008-07-22

    申请号:US10704049

    申请日:2003-11-07

    IPC分类号: G06F7/38

    CPC分类号: G06F9/30018

    摘要: Mechanisms for performing per-bit operations in system memory in a single operation thereby obviating the need for semaphore mechanisms when performing per-bit operations. A processor accesses an instruction that identifies the specific bit of system memory that is to be operated upon, as well as an operation to be performed on the bit. The operation may be, for example, a bit set, clear, or toggle. The processor then instructs system memory to perform the operation. Since the operation is performed in a single operation, other processes do not need to wait before continuing operation on the memory address of the specific bit. In addition, semaphores restricting access to the memory address need not be used while still retaining adequate assurance that the memory address will remain consistent.

    摘要翻译: 用于在单个操作中执行系统存储器中的每位操作的机制,从而避免了在执行每位操作时对信号量机制的需要。 处理器访问一个指令,该指令标识要在其上操作的系统存储器的特定位,以及对该位执行的操作。 该操作可以是例如位设置,清除或切换。 然后处理器指示系统内存执行操作。 由于在单次操作中执行操作,所以其他进程在继续操作特定位的存储器地址之前不需要等待。 此外,不需要使用限制访问存储器地址的信号量,同时仍然保持足够的保证,内存地址将保持一致。

    Consistency checking over internal information in an optical transceiver
    44.
    发明授权
    Consistency checking over internal information in an optical transceiver 有权
    一致性检查光收发器中的内部信息

    公开(公告)号:US07657186B2

    公开(公告)日:2010-02-02

    申请号:US11073886

    申请日:2005-03-07

    IPC分类号: H04B10/00

    CPC分类号: H04B10/0799 H04B10/40

    摘要: A method that enables an optical transceiver to perform consistency checking, such as Cyclic Redundancy Checking (CRC), over internal information stored in the transceiver's memory while the transceiver is in operation. The optical transceiver includes a system memory and a consistency checker component. The consistency checker component determines that consistency checking is to be performed and identifies which portion of the system memory is to be checked. The consistency checker reads the portion of system memory and determines whether or not the portion of system memory is consistent with an expected consistency check value.

    摘要翻译: 一种使光收发器能够在收发器工作时通过存储在收发器存储器中的内部信息执行循环冗余校验(CRC)等一致性检查的方法。 光收发器包括系统存储器和一致性检验器组件。 一致性检查器组件确定要执行一致性检查,并确定要检查系统内存的哪一部分。 一致性检查器读取系统内存的一部分,并确定系统内存的一部分是否与预期的一致性检查值一致。