System and method for performing memory management using hardware transactions
    41.
    发明授权
    System and method for performing memory management using hardware transactions 有权
    使用硬件事务执行内存管理的系统和方法

    公开(公告)号:US09043363B2

    公开(公告)日:2015-05-26

    申请号:US13167606

    申请日:2011-06-23

    IPC分类号: G06F17/30 G06F9/46

    摘要: The systems and methods described herein may be used to implement a shared dynamic-sized data structure using hardware transactional memory to simplify and/or improve memory management of the data structure. An application (or thread thereof) may indicate (or register) the intended use of an element of the data structure and may initialize the value of the data structure element. Thereafter, another thread or application may use hardware transactions to access the data structure element while confirming that the data structure element is still part of the dynamic data structure and/or that memory allocated to the data structure element has not been freed. Various indicators may be used determine whether memory allocated to the element can be freed.

    摘要翻译: 本文描述的系统和方法可以用于使用硬件事务存储器实现共享的动态大小的数据结构,以简化和/或改善数据结构的存储器管理。 应用程序(或其线程)可以指示(或注册)数据结构的元素的预期用途,并且可以初始化数据结构元素的值。 此后,另一个线程或应用程序可以使用硬件事务来访问数据结构元素,同时确认数据结构元素仍然是动态数据结构的一部分,和/或分配给数据结构元素的存储器尚未被释放。 可以使用各种指标来确定分配给元素的内存是否可以被释放。

    System and method for performing dynamic mixed mode read validation in a software transactional memory
    42.
    发明授权
    System and method for performing dynamic mixed mode read validation in a software transactional memory 有权
    用于在软件事务存储器中执行动态混合模式读取验证的系统和方法

    公开(公告)号:US08595446B2

    公开(公告)日:2013-11-26

    申请号:US12626333

    申请日:2009-11-25

    IPC分类号: G06F12/00 G06F13/00 G06F13/28

    摘要: The transactional memory system described herein may apply a mix of read validation techniques to validate read operations (e.g., invisible reads and/or semi-visible reads) in different transactions, or to validate different read operations within a single transaction (including reads of the same location). The system may include mechanisms to dynamically determine that a read validation technique should be replaced by a different technique for reads of particular locations or for all subsequent reads, and/or to dynamically adjust the balance between different read validation techniques to manage costs. Some of the read validation techniques may be supported by hardware transactional memory (HTM). The system may delay acquisition of ownership records for reading, and may acquire two or more ownership records back-to-back (e.g., within a single hardware transaction). The user code of a software transaction may be divided into multiple segments, some of which may be executed within a hardware transaction.

    摘要翻译: 本文描述的事务存储器系统可以应用读取验证技术的混合来验证不同事务中的读取操作(例如,不可见的读取和/或半可见读取),或验证单个事务中的不同读取操作(包括 相同的位置)。 该系统可以包括动态地确定读取验证技术应该被用于读取特定位置或所有后续读取的不同技术所替代的机制,和/或动态地调整不同读取验证技术之间的平衡来管理成本。 一些读取验证技术可能由硬件事务存储器(HTM)支持。 系统可能会延迟获取所有权记录以进行读取,并可能背靠背获取两个或多个所有权记录(例如,在单个硬件事务中)。 软件事务的用户代码可以被划分成多个段,其中一些可以在硬件事务中执行。

    System and method for performing visible and semi-visible read operations in a software transactional memory
    43.
    发明授权
    System and method for performing visible and semi-visible read operations in a software transactional memory 有权
    在软件事务存储器中执行可见和半可见读操作的系统和方法

    公开(公告)号:US08239635B2

    公开(公告)日:2012-08-07

    申请号:US12570591

    申请日:2009-09-30

    IPC分类号: G06F12/00

    CPC分类号: G06F9/467

    摘要: The software transactional memory system described herein may implement a revocable mechanism for managing read ownership in a shared memory. In this system, write ownership may be revoked by readers or writers at any time other than when a writer transaction is in a commit state, wherein its write ownership is irrevocable. An ownership record associated with one or more locations in the shared memory may include an indication of whether the memory locations are owned for writing, and an identifier of the latest writer. A read ownership array may record data indicating which, if any, threads currently own the memory locations for reading. The system may provide an efficient read-validation operation, in which a full read-set validation is avoided unless a change in a global read-write conflict counter value indicates a potential conflict. The system may support a wide range of contention management policies, and may provide implicit privatization.

    摘要翻译: 本文描述的软件事务存储器系统可以实现用于管理共享存储器中的读取所有权的可撤销机制。 在该系统中,写入所有权可以在写入器交易处于提交状态之外的任何时候被读者或作者撤销,其中写入所有权是不可撤销的。 与共享存储器中的一个或多个位置相关联的所有权记录可以包括存储器位置是否拥有用于写入的指示以及最新写入器的标识符。 读取所有权阵列可以记录指示线程当前拥有哪个(如果有的话)拥有用于读取的存储器位置的数据。 系统可以提供有效的读取验证操作,其中避免完全读取确认,除非全局读写冲突计数器值的改变表示潜在的冲突。 该系统可以支持广泛的争用管理策略,并可能提供隐含的私有化。

    Breakpoints in a transactional memory-based representation of code
    44.
    发明授权
    Breakpoints in a transactional memory-based representation of code 有权
    基于事务内存的代码表示中的断点

    公开(公告)号:US07620850B2

    公开(公告)日:2009-11-17

    申请号:US11552884

    申请日:2006-10-25

    IPC分类号: G06F11/00

    CPC分类号: G06F11/362

    摘要: Transactional programming promises to substantially simplify the development and maintenance of correct, scalable, and efficient concurrent programs. Designs for supporting transactional programming using transactional memory implemented in hardware, software, and a mixture of the two have emerged recently. However, certain features and capabilities that would be desirable for debugging programs executed using transactional memory are absent from conventional debuggers. Breakpointing is one example of a capability not well supported when conventional debugging technology is applied to transactional memory. We describe techniques by which a debugger may instrument code (or by which a TM library may provide functionality) to direct execution of an atomic block to a code path that facilitates breakpoint handling.

    摘要翻译: 事务性规划将大大简化正确,可扩展和高效并发程序的开发和维护。 最近出现了使用在硬件,软件和两者的混合中实现的事务性存储来支持事务性编程的设计。 然而,对于使用事务性存储器执行的调试程序来说,期望的某些功能和功能在常规调试器中不存在。 断点是传统调试技术应用于事务性存储器时不能很好支持的功能的一个例子。 我们描述了一种调试器可以通过调试器来实现代码(或TM库可以提供功能)的技术,以将原子块的执行指导到便于断点处理的代码路径。

    System and method for executing nested atomic blocks using split hardware transactions
    45.
    发明授权
    System and method for executing nested atomic blocks using split hardware transactions 有权
    使用分割硬件事务执行嵌套原子块的系统和方法

    公开(公告)号:US07516366B2

    公开(公告)日:2009-04-07

    申请号:US11840439

    申请日:2007-08-17

    IPC分类号: G06F11/00

    CPC分类号: G06F9/466 G06F11/1405

    摘要: Split hardware transaction techniques may support execution of serial and parallel nesting of code within an atomic block to an arbitrary nesting depth. An atomic block including child code sequences nested within a parent code sequence may be executed using separate hardware transactions for each child, but the execution of the parent code sequence, the child code sequences, and other code within the atomic block may appear to have been executed as a single transaction. If a child transaction fails, it may be retried without retrying the parent code sequence or other child code sequences. Before a child transaction is executed, a determination of memory consistency may be made. If a memory inconsistency is detected, the child transaction may be retried or control may be returned to its parent. Memory inconsistencies between parallel child transactions may be resolved by serializing their execution before retrying at least one of them.

    摘要翻译: 分割硬件事务技术可以支持将原子块内的代码的串行和并行嵌套执行到任意的嵌套深度。 包含嵌套在父代码序列中的子代码序列的原子块可以使用针对每个子代的单独的硬件事务执行,但是原子块中的父代码序列,子代码序列和其他代码的执行可能看起来已经被 作为单个事务执行。 如果子事务失败,则可以重试该子事务而不重试父代码序列或其他子代码序列。 在执行子事务之前,可以确定内存一致性。 如果检测到内存不一致,则可能会重试子进程,或者可以将控制权返回给其父进程。 并行子事务之间的内存不一致可以通过在重新执行其中的至少一个之前对其执行进行序列化来解决。

    BREAKPOINTS IN A TRANSACTIONAL MEMORY-BASED REPRESENTATION OF CODE
    46.
    发明申请
    BREAKPOINTS IN A TRANSACTIONAL MEMORY-BASED REPRESENTATION OF CODE 有权
    基于内存的基于代码的代码表示的突破

    公开(公告)号:US20080010532A1

    公开(公告)日:2008-01-10

    申请号:US11552884

    申请日:2006-10-25

    IPC分类号: G06F11/00

    CPC分类号: G06F11/362

    摘要: Transactional programming promises to substantially simplify the development and maintenance of correct, scalable, and efficient concurrent programs. Designs for supporting transactional programming using transactional memory implemented in hardware, software, and a mixture of the two have emerged recently. However, certain features and capabilities that would be desirable for debugging programs executed using transactional memory are absent from conventional debuggers. Breakpointing is one example of a capability not well supported when conventional debugging technology is applied to transactional memory. We describe techniques by which a debugger may instrument code (or by which a TM library may provide functionality) to direct execution of an atomic block to a code path that facilitates breakpoint handling.

    摘要翻译: 事务性规划将大大简化正确,可扩展和高效并发程序的开发和维护。 最近出现了使用在硬件,软件和两者的混合中实现的事务性存储来支持事务性编程的设计。 然而,对于使用事务性存储器执行的调试程序来说,期望的某些功能和功能在常规调试器中不存在。 断点是传统调试技术应用于事务性存储器时不能很好支持的功能的一个例子。 我们描述了一种调试器可以通过调试器来实现代码(或TM库可以提供功能)的技术,以将原子块的执行指导到便于断点处理的代码路径。

    DELAYED BREAKPOINTS
    47.
    发明申请
    DELAYED BREAKPOINTS 有权
    延迟休息

    公开(公告)号:US20080005193A1

    公开(公告)日:2008-01-03

    申请号:US11552907

    申请日:2006-10-25

    IPC分类号: G06F17/30

    CPC分类号: G06F11/3644 G06F11/3632

    摘要: Transactional programming promises to substantially simplify the development and maintenance of correct, scalable, and efficient concurrent programs. Designs for supporting transactional programming using transactional memory implemented in hardware, software, and a mixture of the two have emerged recently. Unfortunately, conventional debugging programs are often inadequate when employed in relation to code that employs transactional memory and new or modified techniques are needed. Implementations of delayed breakpoints are described that provide programmers with the benefits of breakpoints in transactional code, while minimizing the side-effects of breakpoints placed inside atomic block.

    摘要翻译: 事务性规划将大大简化正确,可扩展和高效并发程序的开发和维护。 最近出现了使用在硬件,软件和两者的混合中实现的事务性存储来支持事务性编程的设计。 不幸的是,传统的调试程序在采用事务性存储器的代码方面经常是不足够的,需要新的或修改的技术。 描述了延迟断点的实现,为程序员提供事务代码中的断点的好处,同时最小化放置在原子块内的断点的副作用。