公开(公告)号：US20130043931A1

公开(公告)日：2013-02-21

申请号：US13222453

申请日：2011-08-31

申请人： Nadim Khlat ,  Joseph Hubert Colles

发明人： Nadim Khlat ,  Joseph Hubert Colles

IPC分类号： G05F3/02

CPC分类号： H02M3/07 ,  H02M2001/009

摘要： Disclosed is a charge pump having first and second outputs and at least one capacitor. A plurality of switches are coupled to the at least one capacitor for selectively coupling the at least one capacitor between a high voltage node and a low voltage node, and for selectively coupling the at least one capacitor to the first output and the second output. A switch controller is adapted to generate control signals for the plurality of switches to selectively couple the at least one capacitor between the high voltage node and the low voltage node during charging, and to selectively couple the at least one capacitor to the first output and the second output during discharging that output a first voltage pulse from the first output and a second voltage pulse from the second output such that the first voltage pulse and the second voltage pulse are asymmetrical and coincidental.

摘要翻译： 公开了一种具有第一和第二输出的电荷泵和至少一个电容器。 多个开关耦合到所述至少一个电容器，用于选择性地将所述至少一个电容器耦合在高压节点和低电压节点之间，并且用于选择性地将所述至少一个电容器耦合到所述第一输出和所述第二输出。 开关控制器适于产生用于多个开关的控制信号，以在充电期间选择性地将高电压节点和低电压节点之间的至少一个电容器耦合，并且选择性地将至少一个电容器耦合到第一输出端 在第一输出端输出第一电压脉冲和来自第二输出的第二电压脉冲的放电期间的第二输出，使得第一电压脉冲和第二电压脉冲不对称和重合。

公开(公告)号：US20120256702A1

公开(公告)日：2012-10-11

申请号：US13435393

申请日：2012-03-30

申请人： Nadim Khlat ,  Marcus Granger-Jones

发明人： Nadim Khlat ,  Marcus Granger-Jones

IPC分类号： H03H9/70

CPC分类号： H03H7/48 ,  H03H7/09 ,  H03H7/38 ,  H03H7/463 ,  H04B1/0064 ,  H04B1/52 ,  H04B1/525

摘要： The present disclosure relates to a hybrid transformer duplexer apparatus. The hybrid transformer duplexer apparatus includes an autotransformer having a first port, a second port and a tap coupled to a first antenna port. A step-down transformer has a primary winding with a first terminal coupled to the first port of the autotransformer and a second terminal coupled to the second port of the autotransformer, and a secondary winding having a third terminal coupled to a second antenna port and a fourth terminal coupled to a common node.

摘要翻译： 本公开涉及一种混合变压器双工器装置。 混合变压器双工器装置包括具有第一端口，第二端口和耦合到第一天线端口的抽头的自耦变压器。 降压变压器具有初级绕组，其具有耦合到自耦变压器的第一端口的第一端子和耦合到自耦变压器的第二端口的第二端子，以及次级绕组，其具有耦合到第二天线端口的第三端子和 第四终端耦合到公共节点。

公开(公告)号：US20120201172A1

公开(公告)日：2012-08-09

申请号：US13020548

申请日：2011-02-03

申请人： Nadim Khlat ,  Marcus Granger-Jones

发明人： Nadim Khlat ,  Marcus Granger-Jones

IPC分类号： H04B7/00 ,  H04W4/00

CPC分类号： H04B1/1036

摘要： A tunable receiver system uses programmable notch filters to identify available channel pairs for transmitting and receiving data via a femtocell base station. In addition, one of the programmable notch filters may be used to suppress infiltration of the transmit path signal into the receiver path of the receiver device. The other programmable notch filter may be used to suppress a blocker signal identified by the receiver device.

摘要翻译： 可调谐接收机系统使用可编程陷波滤波器来识别用于经由毫微微小区基站发送和接收数据的可用信道对。 此外，可编程陷波滤波器之一可以用于抑制发射路径信号进入接收机设备的接收机路径的渗透。 另一个可编程陷波滤波器可用于抑制由接收机设备识别的阻塞信号。

公开(公告)号：US08180384B1

公开(公告)日：2012-05-15

申请号：US11777663

申请日：2007-07-13

申请人： Nadim Khlat ,  David Myara

发明人： Nadim Khlat ,  David Myara

IPC分类号： H04J3/06

CPC分类号： H04W56/0045

摘要： An RF transmitter that, during a transmission session, transmits multiple data slices, which are synchronized to each other by a transmit counter. Typically, the time between transmission of consecutive data slices is constant; however, to synchronize the transmission session with a base station, the time between transmission of consecutive data slices may be occasionally adjusted. By using the transmit counter to synchronize data transmissions, effects of uncompensated latencies or variances in latencies may be reduced or eliminated.

摘要翻译： 在发射会话期间，发射多个数据片段的RF发射机，其由发射计数器彼此同步。 通常，连续数据切片传输之间的时间是恒定的; 然而，为了使传输会话与基站同步，可能偶尔调整连续数据片的传输之间的时间。 通过使用发送计数器来同步数据传输，可以减少或消除未补偿延迟或延迟方面的影响。

公开(公告)号：US20110222444A1

公开(公告)日：2011-09-15

申请号：US13045621

申请日：2011-03-11

申请人： Nadim Khlat ,  Alexander Wayne Hietala

发明人： Nadim Khlat ,  Alexander Wayne Hietala

IPC分类号： H04B7/00

CPC分类号： H03F3/24 ,  H03F3/189 ,  H03F3/211 ,  H03F3/68 ,  H03F2200/222 ,  H03F2200/249 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/411 ,  H03F2200/451 ,  H03F2200/534 ,  H03F2200/537 ,  H03F2200/541 ,  H03F2200/81

摘要： A front end radio architecture (FERA) is disclosed that includes a transmitter block coupled to a power amplifier (PA) via first and second input terminals. A first split-band duplexer is coupled to a first output terminal of the PA and a second split-band duplexer is coupled to a second output terminal of the PA. The PA includes a first amplifier cell and a second amplifier cell that when coupled to the first and second split-band duplexers makes up first and second transmitter chains. Only one of the first and the second transmitter chains is active when a first carrier and a second carrier have a frequency offset that is less than an associated half duplex frequency within a same split-band duplex band, thus preventing third order inter-modulation (IMD) products from falling within an associated receive channel. Otherwise, the first and the second transmitter chains are both active.

摘要翻译： 公开了一种前端无线电架构（FERA），其包括经由第一和第二输入端子耦合到功率放大器（PA）的发射机模块。 第一分波分双工器耦合到PA的第一输出端，​​而第二分波分双工器耦合到PA的第二输出端。 PA包括第一放大器单元和第二放大器单元，当耦合到第一和第二分离带双工器组成第一和第二发送器链时。 当第一载波和第二载波具有小于相同分离带双工频带内的相关联的半双工频率的频率偏移时，第一和第二发射机链中只有一个有效，从而防止三阶互调（ IMD）产品落入相关接收渠道内。 否则，第一和第二发射机链都是活动的。

公开(公告)号：US07697632B2

公开(公告)日：2010-04-13

申请号：US10596910

申请日：2004-12-22

申请人： Nadim Khlat ,  Conor O'Keefe ,  Patrick J. Pratt

发明人： Nadim Khlat ,  Conor O'Keefe ,  Patrick J. Pratt

IPC分类号： H03K9/00 ,  H04L27/00

CPC分类号： H03D7/166 ,  H03D3/002 ,  H03D2200/0078 ,  H03D2200/0082

摘要： A slot-based low Intermediate Frequency (‘IF’) radio receiver comprises an IF local oscillator for producing I and Q IF local oscillator signal components in phase quadrature, and I and Q mixer channels for mixing the input signal with the I and Q IF local oscillator signal components to produce I and Q IF signal components. The IF local oscillator frequency alternates a plurality of times during each frame between first and second values, one of which is greater and the other smaller than the desired carrier frequency of the input signal so as to reduce the effect of adjacent and alternate interferers. The phase of the baseband local oscillator is alternated in synchronism with the alternation of the IF local oscillator frequency.

摘要翻译： 基于时隙的低中频（“IF”）无线电接收机包括用于产生相位正交的I和Q IF本地振荡器信号分量的IF本地振荡器，以及用于将输入信号与I和Q IF混频的I和Q混频器信道 本地振荡器信号分量产生I和Q IF信号分量。 IF本地振荡器频率在第一和第二值之间的每个帧期间交替多次，其中一个值较大，另一个小于输入信号的期望载波频率，以便减少相邻和替代干扰源的影响。 基带本机振荡器的相位与IF本地振荡器频率的交替同步交替。

公开(公告)号：US07668249B1

公开(公告)日：2010-02-23

申请号：US11459812

申请日：2006-07-25

申请人： Nadim Khlat

发明人： Nadim Khlat

IPC分类号： H04L5/12 ,  H04L23/02

CPC分类号： H04B1/707

摘要： The present invention includes a digital quadrature rate converter and an oversampling interpolator, which are used to receive digital quadrature modulation data at one clock rate and to provide oversampled digital quadrature modulation data at a higher clock rate. Rate conversion and oversampled interpolation are used to accommodate systems with multiple clock frequencies and to generate modulation signals with low distortion. Some embodiments of the present invention add timing control to the oversampled interpolation. Some embodiments of the present invention may combine the rate conversion, oversampled interpolation, and timing control operations into a single digital circuit.

摘要翻译： 本发明包括数字正交速率转换器和过采样内插器，其用于以一个时钟速率接收数字正交调制数据，并以更高的时钟速率提供过采样的数字正交调制数据。 速率转换和过采样内插用于适应具有多个时钟频率的系统，并产生低失真的调制信号。 本发明的一些实施例将定时控制添加到过采样内插。 本发明的一些实施例可以将速率转换，过采样内插和定时控制操作组合成单个数字电路。

公开(公告)号：US07593491B1

公开(公告)日：2009-09-22

申请号：US11538318

申请日：2006-10-03

申请人： Nadim Khlat ,  Marcus Granger-Jones ,  Mark Alexander John Moffat

发明人： Nadim Khlat ,  Marcus Granger-Jones ,  Mark Alexander John Moffat

IPC分类号： H04L27/06

CPC分类号： H04B1/30 ,  H04B1/406

摘要： The present invention is a quadrature multi-mode RF receiver that uses a single quadrature mixer for tuning to desired frequency bands. In a direct conversion mode of operation, the RF receiver down converts a received RF signal directly into a baseband signal. In a VLIF mode of operation, the RF receiver down converts a received RF signal into a VLIF signal. When receiving a wanted RF signal, the frequency of the resulting VLIF signal is called the wanted VLIF frequency, and is based on the signal strength of the received RF signal. In one embodiment of the present invention, the wanted VLIF frequency is selected to be one of two VLIF frequencies. The wanted VLIF frequency is inversely related to the signal strength of the received RF signal.

摘要翻译： 本发明是使用单个正交混频器调谐到期望频带的正交多模式RF接收机。 在直接转换操作模式中，RF接收机将接收到的RF信号直接转换成基带信号。 在VLIF操作模式中，RF接收机将接收的RF信号下变频为VLIF信号。 当接收到所需的RF信号时，产生的VLIF信号的频率被称为有用的VLIF频率，并且基于所接收的RF信号的信号强度。 在本发明的一个实施例中，所需的VLIF频率被选择为两个VLIF频率之一。 所需的VLIF频率与所接收的RF信号的信号强度成反比。

公开(公告)号：US07474708B1

公开(公告)日：2009-01-06

申请号：US11215439

申请日：2005-08-30

申请人： Nadim Khlat ,  Ruediger Bauder ,  Marcus Granger-Jones

发明人： Nadim Khlat ,  Ruediger Bauder ,  Marcus Granger-Jones

IPC分类号： H04L25/49

CPC分类号： H04L27/0008 ,  H04B1/707 ,  H04B2201/70707 ,  H04L27/2017 ,  H04L27/2032 ,  H04L27/36 ,  H04L27/367 ,  H04W52/38 ,  H04W52/52

摘要： A modulator for a multimode wireless transmitter is provided. In general, the modulator has three modes of operation: an Enhanced Data Rates for Global System for Mobile Communications Evolution (EDGE) mode, which may be referred to as an 8-Level Phase Shift Keying (8PSK) mode; a Gaussian Minimum Shift Keying (GMSK) mode; and a Wideband Code Division Multiple Access (WCDMA) mode.

摘要翻译： 提供了一种用于多模无线发射机的调制器。 一般来说，调制器具有三种操作模式：全球移动通信系统（EDGE）模式的增强数据速率，可被称为8级相移键控（8PSK）模式; 高斯最小偏移键控（GMSK）模式; 和宽带码分多址（WCDMA）模式。

公开(公告)号：US07385451B2

公开(公告)日：2008-06-10

申请号：US10537634

申请日：2003-11-27

申请人： Hugues Beaulaton ,  Philippe Gorisse ,  Nadim Khlat

发明人： Hugues Beaulaton ,  Philippe Gorisse ,  Nadim Khlat

IPC分类号： H03L7/00

CPC分类号： H03M7/3022 ,  H03L7/1976

摘要： A noise shaping arrangement for a phase locked loop includes a first order sigma-delta modulator arranged to provide a first-order quantized output and a feedback path output. A second order sigma-delta modulator is arranged to receive the feedback path output and provides a second order quantized output. A combination block combines the first and second order quantized outputs to provide a combined third order quantized output, which provides noise shaping with a frequency notch spectrum. In this way a new quantization noise shape of third order is provided, such that quantization phase noise may be lowered, the PLL loop bandwidth may be increased, modulation phase error may be reduced and PLL locking speed increased.

摘要翻译： 用于锁相环的噪声整形装置包括布置成提供一阶量化输出和反馈路径输出的一阶Σ-Δ调制器。 第二级Σ-Δ调制器被布置成接收反馈路径输出并提供二阶量化输出。 组合块组合了第一和第二阶量化输出以提供组合的三阶量化输出，其提供具有频率陷波频谱的噪声整形。 以这种方式，提供三阶新的量化噪声形状，使得量化相位噪声可能降低，PLL环路带宽可能增加，调制相位误差可能降低，PLL锁定速度提高。