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公开(公告)号：US11895323B2
公开(公告)日：2024-02-06
申请号：US18058057
申请日：2022-11-22
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N11/02 , H04N19/52 , H04N19/119 , H04N19/176
CPC classification number: H04N19/52 , H04N19/119 , H04N19/176
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
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公开(公告)号：US11889078B2
公开(公告)日：2024-01-30
申请号：US17833540
申请日：2022-06-06
Inventor： Chong Soon Lim , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Ru Ling Liao , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/119 , H04N19/159 , H04N19/176 , H04N19/196 , H04N19/96 , H04N19/157 , H04N19/463
CPC classification number: H04N19/119 , H04N19/157 , H04N19/159 , H04N19/176 , H04N19/196 , H04N19/463 , H04N19/96
Abstract: An image encoder/decoder includes circuitry and a memory coupled to the circuitry. When a geometry of a block of a picture satisfies a first condition, the circuitry splits the block of the picture into sub blocks having a first set of geometries. When the geometry of the block does not satisfy the first condition, the circuitry splits the block of the picture into sub blocks having a second set of geometries, the second set of geometries being different from the first set of geometries. The circuitry encodes/decodes the sub blocks of the block.
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公开(公告)号：US11889059B2
公开(公告)日：2024-01-30
申请号：US17875965
申请日：2022-07-28
Inventor： Jing Ya Li , Ru Ling Liao , Chong Soon Lim , Han Boon Teo , Hai Wei Sun , Che Wei Kuo , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/105 , H04N19/136 , H04N19/159 , H04N19/176 , H04N19/52 , H04N19/80
CPC classification number: H04N19/105 , H04N19/136 , H04N19/159 , H04N19/176 , H04N19/52 , H04N19/80
Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry: derives an absolute value of a sum of horizontal gradient values; derives, as a first parameter, the total sum of the absolute values of horizontal gradient values; derives, as a second parameter, the total sum of the absolute values of vertical gradient values; derives a horizontal-related pixel difference value; derives, as a third parameter, the total sum of the absolute values of horizontal-related pixel difference values; derives a vertical-related pixel difference value; derives, as a fourth parameter, the total sum of the absolute values of vertical-related pixel difference values; and generates a prediction image using the first to fourth parameters.
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公开(公告)号：US11882279B2
公开(公告)日：2024-01-23
申请号：US17725106
申请日：2022-04-20
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/52 , H04N19/119 , H04N19/137 , H04N19/176
CPC classification number: H04N19/119 , H04N19/137 , H04N19/176 , H04N19/52
Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
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公开(公告)号：US11877009B2
公开(公告)日：2024-01-16
申请号：US17727299
申请日：2022-04-22
Inventor： Jing Ya Li , Che Wei Kuo , Chong Soon Lim , Chu Tong Wang , Han Boon Teo , Hai Wei Sun , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Yusuke Kato
IPC: H04N19/66 , H04N19/122 , H04N19/176 , H04N19/103 , H04N19/96
CPC classification number: H04N19/66 , H04N19/122 , H04N19/176 , H04N19/103 , H04N19/96
Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
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Patent Agency Ranking
公开(公告)号：US11838550B2
公开(公告)日：2023-12-05
申请号：US17723324
申请日：2022-04-18
Inventor： Jing Ya Li , Che Wei Kuo , Chong Soon Lim , Chu Tong Wang , Han Boon Teo , Hai Wei Sun , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Yusuke Kato
IPC: H04N19/66 , H04N19/122 , H04N19/176 , H04N19/103 , H04N19/96
CPC classification number: H04N19/66 , H04N19/122 , H04N19/176 , H04N19/103 , H04N19/96
Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
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公开(公告)号：US11838505B2
公开(公告)日：2023-12-05
申请号：US17724179
申请日：2022-04-19
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/119 , H04N19/176
CPC classification number: H04N19/119 , H04N19/176
Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
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公开(公告)号：US11785243B2
公开(公告)日：2023-10-10
申请号：US17530918
申请日：2021-11-19
Inventor： Jing Ya Li , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Han Boon Teo , Kiyofumi Abe , Tadamasa Toma , Takahiro Nishi
IPC: H04N19/513 , H04N19/433
CPC classification number: H04N19/513 , H04N19/433
Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. In operation, the circuitry: derives a base motion vector to be used in predicting a current block to be encoded; derives a first motion vector different from the base motion vector; derives a motion vector difference based on a difference between the base motion vector and the first motion vector; determines whether the motion vector difference is greater than a threshold; modifies the first motion vector when the motion vector difference is determined to be greater than the threshold, and does not modify the first motion vector when the motion vector difference is determined not to be greater than the threshold; and encodes the current block using the first motion vector modified or the first motion vector not modified.
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49.发明授权公开(公告)号：US11722662B2
公开(公告)日：2023-08-08
申请号：US17837171
申请日：2022-06-10
Inventor： Chong Soon Lim , Hai Wei Sun , Han Boon Teo , Jing Ya Li , Che-Wei Kuo , Kiyofumi Abe , Tadamasa Toma , Takahiro Nishi , Yusuke Kato
IPC: H04N19/117 , H04N19/176 , H04N19/51 , H04N19/80
CPC classification number: H04N19/117 , H04N19/176 , H04N19/51 , H04N19/80
Abstract: An encoder that encodes a current block to be encoded in an image is provided. The encoder includes: processor; and memory coupled to the processor, in which, in operation, the processor: generates a first prediction image based on a motion vector, the first prediction image being an image with full-pel precision; generates a second prediction image using an interpolation filter by interpolating a value at a fractional-pel position between full-pel positions included in the first prediction image; and encodes the current block based on the second prediction image, and in the using of the interpolation filter, the interpolation filter is switched between a first interpolation filter and a second interpolation filter differing in a total number of taps from the first interpolation filter.
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公开(公告)号：US11638012B2
公开(公告)日：2023-04-25
申请号：US17405244
申请日：2021-08-18
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/159 , H04N19/139 , H04N19/119 , H04N19/513
Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.
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