公开(公告)号：US5646535A

公开(公告)日：1997-07-08

申请号：US373017

申请日：1995-01-17

Applicant: Pascal Dornier

Inventor： Pascal Dornier

IPC: G06F11/22 ,  G06F11/32 ,  G01R31/02

CPC classification number: G06F11/22 ,  G06F11/326

Abstract: A computer system has dual-color LEDs for the LEDs conventionally indicating power on and hard disk drive activity, and a control circuit drives the LEDs in on-off and color combinations to indicate diagnostic information. In a preferred embodiment, a control circuit for controlling the LEDs is addressable as a port, and state combinations of the LEDs are set according to data sent to the port address of the control circuit. Also in a preferred embodiment, a POST routine for the computer system is divided into specific tests and groups of tests by commands configured to write a specific data string to a port address depending upon the position of the control command in the POST routine.

Abstract translation: 计算机系统具有用于LED的双色LED，其常规地指示电源开启和硬盘驱动器活动，并且控制电路驱动LED的开 - 关和颜色组合以指示诊断信息。 在优选实施例中，用于控制LED的控制电路可寻址为端口，并且根据发送到控制电路的端口地址的数据来设置LED的状态组合。 同样在优选实施例中，根据POST程序中的控制命令的位置，用于计算机系统的POST例程被分配成特定测试和测试组，命令被配置为将特定数据串写入端口地址。

公开(公告)号：US5504877A

公开(公告)日：1996-04-02

申请号：US346513

申请日：1994-11-29

Applicant: Pascal Dornier

Inventor： Pascal Dornier

IPC: G11C7/22 ,  G06F1/04

CPC classification number: G11C7/22

Abstract: Timing is set for DRAM memory access in a computer by polling the DRAM memory banks, calculating capacitive load by accessing a prestored table of capacitive load versus DRAM size, and assigning wait states according to calculated capacitive load by accessing a prestored formula. In one embodiment, wait states are assigned in increasing increments for increasing total capacitive load. In an alternative embodiment, timing is assigned bank by bank. Control routines are preferably a part of a system BIOS.

Abstract translation: 通过轮询DRAM存储器来计算计算机中的DRAM存储器访问的时序，通过访问容量负载与DRAM大小的预存储表来计算容性负载，以及通过访问预先存储的公式来根据计算的容性负载来分配等待状态。 在一个实施例中，等待状态以递增的增量被分配以增加总容性负载。 在替代实施例中，按银行划分时间。 控制例程优选地是系统BIOS的一部分。