公开(公告)号：US20170207905A1

公开(公告)日：2017-07-20

申请号：US15403782

申请日：2017-01-11

Applicant: QUALCOMM Incorporated

Inventor： Alecsander Eitan ,  Ran Hay ,  Javier Frydman ,  Gal Basson ,  Amichai Sanderovich

IPC: H04L7/027 ,  H04L12/26 ,  H04L29/06 ,  H04L25/02 ,  H04L5/00

CPC classification number: H04L7/0276 ,  H04L1/008 ,  H04L1/1607 ,  H04L1/1825 ,  H04L1/1854 ,  H04L1/1864 ,  H04L1/1887 ,  H04L1/1896 ,  H04L5/0048 ,  H04L5/0055 ,  H04L25/0202 ,  H04L43/16 ,  H04L69/22 ,  H04L2001/125

Abstract: In certain aspects of the present disclosure an apparatus for wireless communication comprises a processing system and an interface. The processing system is configured to generate a preamble and a first data portion of a frame, wherein the preamble includes information for receiving the frame at a device, receive a message from the device, wherein the message provides feedback of reception of the first data portion by the device, and generate a second data portion of the frame. The interface is configure to output the preamble and the first data portion of the frame for transmission to the device, and output the second data portion of the frame for transmission to the device, wherein transmission of the first and second data portions of the frame are separated in time by a gap, and the message is received within the gap.

公开(公告)号：US20170134126A1

公开(公告)日：2017-05-11

申请号：US15342788

申请日：2016-11-03

Applicant: QUALCOMM Incorporated

Inventor： Amichai Sanderovich ,  Alecsander Eitan ,  Gal Basson

IPC: H04L5/00 ,  H04L27/18 ,  H04W72/04

CPC classification number: H04L5/0044 ,  H04L1/0065 ,  H04L1/0071 ,  H04L1/08 ,  H04L27/18 ,  H04W72/0446

Abstract: Apparatus for generating a header of a transmit frame, and for processing the header of a received frame. The header generating includes encoding header data bits to generate parity bits, repeating the header bits M times, repeating the parity bits N times, encoding the M repetitions of the header bits, encoding the N repetitions of the parity bits, combining the encoded M repetitions of the header bits with the N repetitions of the parity bits, and modulating the combined sequence to generate the header of the frame. The header processing includes demodulating the header to generate a sequence of bits, splitting the sequence into separate header and parity sequences, decoding the header and parity sequences to generate M header and N parity sequences, combining the M header sequences, combining the N parity sequences, and decoding the combined header sequences using the combined parity sequences to generate header data bits.