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公开(公告)号：US20220020324A1
公开(公告)日：2022-01-20
申请号：US17333483
申请日：2021-05-28
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Pan XU
IPC: G09G3/3225 , G11C19/28
Abstract: A shift register unit and a driving method thereof, a gate driving circuit, and a display device. The shift register unit includes: an input circuit, a first capacitor circuit, an output circuit, an output pull-down circuit, a coupling circuit, and an inverter circuit. The inverter circuit is coupled to an input control terminal, a first node, a second node, and a first level signal input terminal, and a second level signal input terminal; and used to control to connect or disconnect the second node and the first level signal input under the control of the input control terminal and the first level signal input terminal; also used to control to connect or disconnect the second node and the second level signal input terminal under the control of the first node and the second level signal input terminal.
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公开(公告)号：US20220020322A1
公开(公告)日：2022-01-20
申请号：US17309360
申请日：2020-08-12
Inventor： Zhongyuan WU , Yongqian LI , Can YUAN , Xuehuan FENG , Zhidong YUAN
IPC: G09G3/3225 , G11C19/28
Abstract: An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate, and a GOA circuit, a source electrode IC and PLG wires arranged on the base substrate, and the PLG wires connect the GOA circuit with the source electrode IC. The GOA circuit transmits a GOA signal, and the GOA signal comprises a cascade signal and a non-cascade signal. The PLG wires comprise a first PLG wire group and at least one second PLG wire group, the first PLG wire group transmits the cascade signal, the second PLG wire group transmits the non-cascade signal, a line width of the first PLG wire group is smaller than that of the second PLG wire group, and the first PLG wire group is located at a side of the second PLG wire group distal to an active area of the base substrate.
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公开(公告)号：US11227549B2
公开(公告)日：2022-01-18
申请号：US16623653
申请日：2019-05-23
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G11C19/28
Abstract: A shift register unit, a driving method thereof, a gate driver and a display device are provided. The shift register unit includes a first input circuit, an output circuit and a charging enhancement circuit. The first input circuit is configured to charge a first node in response to a first input signal; the output circuit is configured to output, under control of a level of the first node, a shift signal for a row-by-row shift of scanning and a first output signal for driving one row of sub-pixel units in a display panel to perform display scanning; and the charging enhancement circuit is configured to further enhance the level, of the first node in response to a charging enhancement signal. The shift register unit may enhance the level of the first node and the reliability of the gate driver and the display device consisted of the shift register unit.
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公开(公告)号：US11222577B2
公开(公告)日：2022-01-11
申请号：US16982148
申请日：2020-04-08
Inventor： Xuehuan Feng , Yongqian Li , Xing Zhang
Abstract: The present disclosure provides a shift register unit, a gate driving circuit and compensation method and driving method thereof, and a display device. The shift register unit includes: a shift register circuit having a detection node, the shift register circuit is configured to receive an input signal and a clock signal, and generate an output signal based on the clock signal under control of the input signal; and a detection circuit coupled to the detection node of the shift register circuit, the detection circuit is configured to generate a detection signal based on a potential of the detection node.
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公开(公告)号：US11158226B2
公开(公告)日：2021-10-26
申请号：US16768536
申请日：2020-01-20
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/20
Abstract: The present disclosure provides a gate driving unit and method, a gate driving module and circuit, and a display device. The gate driving unit includes: an external compensation control signal output terminal, a gate driving signal output terminal, an external compensation control signal output circuit, a gate driving signal output circuit, a pull-up control circuit and a pull-down node control circuit. The pull-up control circuit is configured to, under control of an enabling signal input by an enabling terminal and a current-stage driving signal, control a potential at a first node; under control of the potential at the first node, a first clock signal input by a first clock signal terminal, a second clock signal input by a second clock signal terminal and a potential at a pull-down node, control a potential at a pull-up control node; under control of the potential at the pull-up control node, control a potential at a pull-up node, thereby controlling the potential at the pull-up node to be an effective voltage in a preset time period of a blank time period.
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Patent Agency Ranking
公开(公告)号：US20210327363A1
公开(公告)日：2021-10-21
申请号：US17254047
申请日：2020-06-19
Inventor： Xuehuan Feng , Sixiang Wu
IPC: G09G3/3266 , G11C19/28
Abstract: The present disclosure provides a shift register unit and a method for driving the same, and a gate driving circuit. The shift register unit includes: an adjustment circuit coupled between an input signal terminal and an input node of the shift register unit, and configured to couple or decouple the input signal terminal and the input node under control of a potential at the input signal terminal; an input circuit configured to provide a potential at the input node to the pull-up node under control of a potential at the input signal terminal; an output circuit configured to receive a clock signal from the clock signal terminal and provide an output signal to the output signal terminal based on the received clock signal under control of a potential at the pull-up node; and a control circuit configured to control a potential at the output signal terminal under control of a potential at the pull-up node.
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公开(公告)号：US20210327339A1
公开(公告)日：2021-10-21
申请号：US17298112
申请日：2020-07-29
Inventor： Xuehuan Feng , Yongqian LI
IPC: G09G3/20
Abstract: A shift register includes a first reset circuit having a first transistor and a second transistor, and a selection control circuit connected to a pull-down node, and control electrodes of the first and second transistors. First electrodes of the first and second transistors are connected to a first voltage terminal, and second electrodes of the first and second transistors are connected to a signal output terminal. The selection control circuit is configured to: control a line between the pull-down node and the control electrode of the first transistor, and a line between the pull-down node and the control electrode of the second transistor to be alternately closed. The first reset circuit is configured to output a voltage of the first voltage terminal to the signal output terminal under control of a potential at the pull-down node transmitted by the selection control circuit.
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公开(公告)号：US11127359B2
公开(公告)日：2021-09-21
申请号：US17081384
申请日：2020-10-27
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
IPC: G09G3/3291
Abstract: The present disclosure provides a display panel, a method thereof and a display device. The display panel includes a gate line group, a gate driving circuit, and a sub-pixel unit group. The sub-pixel unit group includes N rows of sub-pixel units, the gate line group includes (N+1) gate lines. The sub-pixel unit includes a light emitting unit, a pixel driving circuit, and a sensing circuit. The gate driving circuit includes output terminals, and is configured to sequentially output gate scanning signals through the output terminals. Each gate line is coupled to one corresponding output terminal. In the sub-pixel unit group, the pixel driving circuit in a sub-pixel unit in an n-th row is coupled to an n-th gate line; and the sensing circuit in the sub-pixel unit in the n-th row is coupled to a (n+1)-th gate line, where 1≤n≤N, and n is an integer.
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499.发明申请公开(公告)号：US20210257442A1
公开(公告)日：2021-08-19
申请号：US17251837
申请日：2020-05-13
Inventor： Wenbin Jia
Abstract: The present disclosure provides a defining solution for preparing a pixel defining layer configured to define individual pixels on a substrate, comprising: a lyophilic material, a lyophobic material and an initiator, wherein the lyophobic material comprises: a first lyophobic material and a second lyophobic material, and wherein a mass average molecular weight of the first lyophobic material is greater than a mass average molecular weight of the second lyophobic material, and a mass average molecular weight of the lyophilic material is greater than the mass average molecular weight of the first lyophobic material. The present disclosure further provides a display panel, a display apparatus and a method of preparing a pixel defining layer.
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公开(公告)号：US20210210017A1
公开(公告)日：2021-07-08
申请号：US16643280
申请日：2019-03-01
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3258 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device and a driving method. The shift register unit includes a blank input circuit, a blank pull-up circuit, a display input circuit, and an output circuit. The blank input circuit charges and holds the level of the pull-up control node, the blank pull-up circuit uses a first clock signal to charge a pull-up node, the display input circuit charges the pull-up node, and the output circuit outputs a plurality of output clock signals respectively to a plurality of output terminals. The plurality of output terminals include a shift signal output terminal and a plurality of pixel signal output terminals. The plurality of pixel signal output terminals are configured to respectively output a plurality of pixel signals to a plurality of rows of pixel units.
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