Abstract:
To detect a power failure in a volatile data memory containing useful data units and test data units associated with the useful data units, the associated test data unit is also read when the useful data unit is read-accessed, and a decision is made as to whether the useful data unit is corrupted based on the test data unit. A power failure is identified when at least two read useful data units within a predefined number of successive read accesses are found to be corrupted.
Abstract:
A method for protecting a microcomputer system against manipulation of data stored in a storage arrangement of the microcomputer system, in particular for protecting a program stored in the storage arrangement. The microcomputer system includes a microcomputer assigned to the storage arrangement, the microcomputer accessing the storage arrangement for the purpose of processing the data, i.e., the program. In order to prevent the manipulation of data in a microcomputer that does not have an internal memory but rather accesses an external storage arrangement and processes the stored data, it is proposed that before the storage arrangement is accessed, an individual identifier be assigned to the or to each allocated microcomputer or to the storage arrangement that a comparison code be generated as a function of the individual identifier and be stored in the storage arrangement, and that, before or during the operation of the microcomputer system, a security code be generated as a function of the individual identifier and be compared with the comparison code.
Abstract:
A device having a processor and a memory element positioned outside the processor, as well as a device for linking a memory element to a processor, and a memory element, are described, the processor and the memory element being linked via address and/or data lines, the address and/or data lines each being implemented in a structure combining a differential structure, LVDS in particular, and a structure having transistors which switch to ground and voltage, SSTL in particular, which has corresponding transmitters and receivers.
Abstract:
A method is described for storing and processing/filtering signals, as well as a memory arrangement, a signal processing arrangement and, in particular, a digital filter arrangement having a plurality of filter modules for digital processing/filtering of input values, having a memory area and a signal processing module, which contains in particular at least one multiplier-accumulator which has at least one multiplier and at least one adder. The input values, coefficients, and output values of the arrangement can be stored in the memory area and called up again therefrom as needed. The input values are gated with the coefficients to form output values. In order to alleviate the load on a higher-level microprocessor by digital processing/filtering of the input values, it is proposed that the digital filter arrangement have a Direct Memory Access controller for coordinating data transmission of the filter coefficients, input values and output values between the multiplier-accumulator and the memory area.