METHOD FOR RECOGNIZING A POWER FAILURE IN A DATA MEMORY AND RECOVERING THE DATA MEMORY
    51.
    发明申请
    METHOD FOR RECOGNIZING A POWER FAILURE IN A DATA MEMORY AND RECOVERING THE DATA MEMORY 有权
    用于识别数据存储器中的电源故障并恢复数据存储器的方法

    公开(公告)号:US20090158089A1

    公开(公告)日:2009-06-18

    申请号:US12097324

    申请日:2006-12-12

    Applicant: Axel Aue

    Inventor: Axel Aue

    Abstract: To detect a power failure in a volatile data memory containing useful data units and test data units associated with the useful data units, the associated test data unit is also read when the useful data unit is read-accessed, and a decision is made as to whether the useful data unit is corrupted based on the test data unit. A power failure is identified when at least two read useful data units within a predefined number of successive read accesses are found to be corrupted.

    Abstract translation: 为了检测包含有用数据单元和与有用数据单元相关联的测试数据单元的易失性数据存储器中的电源故障,当有用数据单元被读取访问时,还读取相关联的测试数据单元,并且作出关于 基于测试数据单元是否损坏了有用的数据单元。 当发现预定数量的连续读访问中的至少两个读有用数据单元被破坏时,识别出电源故障。

    Method for protecting a microcomputer system against manipulation of data stored in a storage arrangement of the microcomputer system
    52.
    发明授权
    Method for protecting a microcomputer system against manipulation of data stored in a storage arrangement of the microcomputer system 失效
    用于保护微型计算机系统免受操纵存储在微计算机系统的存储装置中的数据的方法

    公开(公告)号:US07207066B2

    公开(公告)日:2007-04-17

    申请号:US09766102

    申请日:2001-01-19

    CPC classification number: G06F21/78

    Abstract: A method for protecting a microcomputer system against manipulation of data stored in a storage arrangement of the microcomputer system, in particular for protecting a program stored in the storage arrangement. The microcomputer system includes a microcomputer assigned to the storage arrangement, the microcomputer accessing the storage arrangement for the purpose of processing the data, i.e., the program. In order to prevent the manipulation of data in a microcomputer that does not have an internal memory but rather accesses an external storage arrangement and processes the stored data, it is proposed that before the storage arrangement is accessed, an individual identifier be assigned to the or to each allocated microcomputer or to the storage arrangement that a comparison code be generated as a function of the individual identifier and be stored in the storage arrangement, and that, before or during the operation of the microcomputer system, a security code be generated as a function of the individual identifier and be compared with the comparison code.

    Abstract translation: 一种用于保护微型计算机系统免受操纵存储在微计算机系统的存储装置中的数据的方法,特别是用于保护存储在存储装置中的程序。 微型计算机系统包括分配给存储装置的微型计算机,为了处理数据即程序而访问存储装置的微型计算机。 为了防止在不具有内部存储器的微型计算机中的数据的操作,而是访问外部存储装置并处理存储的数据,建议在存储装置被访问之前,将个体标识符分配给或 到每个分配的微型计算机或存储装置,作为个人标识符的函数产生比较代码并存储在存储装置中,并且在微计算机系统的操作之前或期间,生成安全码作为 功能,并与比较代码进行比较。

    Device for linking a processor to a memory element and memory element
    53.
    发明授权
    Device for linking a processor to a memory element and memory element 失效
    用于将处理器链接到存储器元件和存储器元件的装置

    公开(公告)号:US06774677B2

    公开(公告)日:2004-08-10

    申请号:US10252946

    申请日:2002-09-23

    Applicant: Axel Aue

    Inventor: Axel Aue

    CPC classification number: G11C7/1006 G11C8/00

    Abstract: A device having a processor and a memory element positioned outside the processor, as well as a device for linking a memory element to a processor, and a memory element, are described, the processor and the memory element being linked via address and/or data lines, the address and/or data lines each being implemented in a structure combining a differential structure, LVDS in particular, and a structure having transistors which switch to ground and voltage, SSTL in particular, which has corresponding transmitters and receivers.

    Abstract translation: 描述了具有位于处理器外部的处理器和存储元件的设备以及用于将存储器元件链接到处理器和存储器元件的设备,处理器和存储器元件通过地址和/或数据链接 线路,地址和/或数据线各自以组合差分结构,特别是LVDS的结构和具有切换到接地和电压的晶体管,特别是具有对应的发射器和接收器的SSTL的结构来实现的结构。

    Arrangement and method for signal processing and storing
    54.
    发明授权
    Arrangement and method for signal processing and storing 失效
    信号处理和存储的布置和方法

    公开(公告)号:US06728796B2

    公开(公告)日:2004-04-27

    申请号:US09769700

    申请日:2001-01-25

    CPC classification number: H03H17/0223 G06F7/5443 G11C7/1006

    Abstract: A method is described for storing and processing/filtering signals, as well as a memory arrangement, a signal processing arrangement and, in particular, a digital filter arrangement having a plurality of filter modules for digital processing/filtering of input values, having a memory area and a signal processing module, which contains in particular at least one multiplier-accumulator which has at least one multiplier and at least one adder. The input values, coefficients, and output values of the arrangement can be stored in the memory area and called up again therefrom as needed. The input values are gated with the coefficients to form output values. In order to alleviate the load on a higher-level microprocessor by digital processing/filtering of the input values, it is proposed that the digital filter arrangement have a Direct Memory Access controller for coordinating data transmission of the filter coefficients, input values and output values between the multiplier-accumulator and the memory area.

    Abstract translation: 描述了一种用于存储和处理/滤波信号的方法,以及存储器布置,信号处理装置,特别是具有多个用于输入值的数字处理/滤波的滤波器模块的数字滤波器装置,具有存储器 区域和信号处理模块,其特别地包含至少一个具有至少一个乘法器和至少一个加法器的乘法器累加器。 该布置的输入值,系数和输出值可以存储在存储器区域中,并且根据需要再次被调出。 输入值与系数门控以形成输出值。 为了通过对输入值的数字处理/滤波来减轻对较高级微处理器的负担,提出了数字滤波器装置具有用于协调滤波器系数的数据传输的直接存储器访问控制器,输入值和输出值 在乘法器累加器和存储器区域之间。

Patent Agency Ranking