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公开(公告)号：US11803949B2
公开(公告)日：2023-10-31
申请号：US16987210
申请日：2020-08-06
Applicant: Apple Inc.
Inventor： Maxim Smirnov , David R. Pope
CPC classification number: G06T5/50 , G06T3/0093 , G06T5/002
Abstract: Embodiments relate to circuitry for temporal processing and image fusion. An image fusion circuit receives captured images, and generates corresponding image pyramids. The generated image pyramids are raster or tiled processed, and stored in memory. A fusion module receives a first and second image pyramids from the memory, and warps and fuses image pyramids to generate a fused image pyramid, which may be used for further processing, and may also be stored back into the memory. The image fusion circuitry is configurable to operate in a plurality of different configuration modes corresponding to different image fusion applications for fusing image pyramids of received images, including two-frame fusion, temporal filtering, infinite impulse response (IIR) temporal processing, and/or finite impulse response (FIR) temporal processing.
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公开(公告)号：US20230289923A1
公开(公告)日：2023-09-14
申请号：US17692574
申请日：2022-03-11
Applicant: Apple Inc.
Inventor： Maxim Smirnov , David R. Pope , Henryk K. Blasinski , Kaiming Liu
IPC: G06T5/00 , G06V10/764 , G06T3/40
CPC classification number: G06T5/002 , G06V10/764 , G06T3/40
Abstract: Embodiments relate to an image processing circuit that performs machine learning (ML) based noise reduction on image data. The image processing circuit includes a ML based noise reduction circuit that includes a hybrid kernel calculation circuit and a noise filtering circuit coupled to the hybrid kernel calculation circuit. The hybrid kernel calculation circuit generates, for each pixel of an image, a hybrid kernel by combining a ML kernel of each pixel of the image and a bilateral kernel of each pixel of the image. The noise filtering circuit performs, for each pixel of the image, noise filtering of the image using the hybrid kernel for each pixel of the image to generate a de-noised version of the image.
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公开(公告)号：US20220303480A1
公开(公告)日：2022-09-22
申请号：US17829363
申请日：2022-06-01
Applicant: Apple Inc.
Inventor： Sheng Lin , D. Amnon Silverstein , David R. Pope
Abstract: Embodiments relate to image signal processors (ISP) that include binner circuits that down-sample an input image. An input image may include a plurality of pixels. The output image of the binner circuit may include a reduced number of pixels. The binner circuit may include a plurality of different operation modes. In a bin mode, the binner circuit may blend a subset of input pixel values to generate an output pixel quad. In a skip mode, the binner circuit may select one of the input pixel values as the output pixel. The selection may be performed randomly to avoid aliasing. In a luminance mode, the binner circuit may take a weighted average of a subset of pixel values having different colors. In a color value mode, the binner circuit may select one of the colors in a subset of pixel values as an output pixel value.
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公开(公告)号：US20220253972A1
公开(公告)日：2022-08-11
申请号：US17173049
申请日：2021-02-10
Applicant: Apple Inc.
Inventor： Maxim Smirnov , David R. Pope
Abstract: Embodiments relate to an image processing circuit able to perform image fusion on received images in at least a first mode for fusing demosaiced and downscaled image data, and a second mode for fusing raw image data. Raw image data is received from an image sensor in Bayer RGB format. In the first mode, the raw image data is demosaiced and resampled prior to undergoing image fusion. On the other hand, in the second raw image mode, the image processing circuit performs image fusion on the raw Bayer image data, and demosaics and resamples the generated fused raw Bayer image. This may ensure a cleaner image signal for image fusion, but consumes more memory. The image processing circuit is configured to support both modes of operation, allowing for fused images to be generated to satisfy the requirements of different applications.
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公开(公告)号：US20210224575A1
公开(公告)日：2021-07-22
申请号：US17163245
申请日：2021-01-29
Applicant: Apple Inc.
Inventor： David R. Pope
Abstract: Methods and systems for detecting keypoints in image data may include an image sensor interface receiving pixel data from an image sensor. A front-end pixel data processing circuit may receive pixel data and convert the pixel data to a different color space format. A back-end pixel data processing circuit may perform one or more operations on the pixel data. An output circuit may receive pixel data and output the pixel data to a system memory. A keypoint detection circuit may receive pixel data from the image sensor interface in the image sensor pixel data format or receive pixel data after processing by the front-end or the back-end pixel data processing circuits. The keypoint detection circuit may perform a keypoint detection operation on the pixel data to detect one or more keypoints in the image frame and output to the system memory a description of the one or more keypoints.
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Patent Agency Ranking
公开(公告)号：US10951843B2
公开(公告)日：2021-03-16
申请号：US16733949
申请日：2020-01-03
Applicant: Apple Inc.
Inventor： Sheng Lin , David R. Pope
Abstract: Embodiments relate to a pixel defect detection circuit for detecting and correcting defective pixels in captured image frames. The pixel defect detection circuit includes a defect pixel location table that maps pixel locations in an image frame to respective confidence values, each confidence value indicating a likelihood that a corresponding pixel is defective. The pixel defect detection circuit further includes a dynamic defect processing circuit configured to determine whether a first pixel of an image frame is defective, and a flatness detection circuit configured to determine whether the first pixel is in a flat region of the image frame. The confidence value corresponding to the location of the first pixel is updated based upon whether the first pixel is determined be defective if the first pixel is determined to be in a flat region, and not updated if the first pixel is determined to not be in a flat region.
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公开(公告)号：US10949953B2
公开(公告)日：2021-03-16
申请号：US16352801
申请日：2019-03-13
Applicant: Apple Inc.
Inventor： Sheng Lin , David R. Pope
Abstract: Embodiments relate to directional bilateral filtering of a raw image. For each pixel in the image, a block of pixels surrounding that pixel is used for filtering. When the block of pixels in a Bayer pattern have directionality, directional filter coefficients are used instead of default filter coefficients. To obtain a directional tap, a directional filter coefficient is attenuated by an attenuation factor that differs based at least on the location of the pixels in the pixel block. The directional taps are blended with non-directional taps derived from the default filter coefficients using a weight representing confidence on the directionality. The filtered pixel values are then obtained by multiplying pixel values with corresponding taps.
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公开(公告)号：US20200242731A1
公开(公告)日：2020-07-30
申请号：US16848287
申请日：2020-04-14
Applicant: Apple Inc.
Inventor： Maxim W. Smirnov , David R. Pope , Oren Kerem , Elena Lamburn
Abstract: Embodiments relate to two stage multi-scale processing of an image. A first stage processing circuitry generates an unscaled single color version of the image that undergoes noise reduction before generating a high frequency component of the unscaled single color version. A scaler generates a first downscaled version of the image comprising a plurality of color components. A second stage processing circuitry generates a plurality of sequentially downscaled images based on the first downscaled version. The second stage processing circuitry processes the first downscaled version and the downscaled images to generate a processed version of the first downscaled version. The unscaled single color high frequency component and the processed version of the first downscaled version of the image are merged to generate a processed version of the image.
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公开(公告)号：US20200051210A1
公开(公告)日：2020-02-13
申请号：US16100709
申请日：2018-08-10
Applicant: Apple Inc.
Inventor： Muge Wang , David R. Pope
Abstract: Embodiments relate to a first demosaicing circuit and a second demosaicing circuit that can perform demosaicing of image data. The first demosaicing circuit processes received image data to generate a first demosaiced image for obtaining statistic information on the received image data. The second demosaicing circuit performs demosaicing of the received image data to generate a second demosaiced image. A processing circuit pipeline performs at least one of resampling, noise processing, color processing and output rescaling performed on the second demosaiced image based on the statistics information obtained from the first demosaiced image.
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公开(公告)号：US20200051209A1
公开(公告)日：2020-02-13
申请号：US16100823
申请日：2018-08-10
Applicant: Apple Inc.
Inventor： Maxim Smirnov , David R. Pope , Oren Kerem , Elena Lamburn
Abstract: Embodiments relate to two stage multi-scale processing of an image. A first stage processing circuitry generates an unscaled single color version of the image that undergoes noise reduction before generating a high frequency component of the unscaled single color version. A scaler generates a first downscaled version of the image comprising a plurality of color components. A second stage processing circuitry generates a plurality of sequentially downscaled images based on the first downscaled version. The second stage processing circuitry processes the first downscaled version and the downscaled images to generate a processed version of the first downscaled version. The unscaled single color high frequency component and the processed version of the first downscaled version of the image are merged to generate a processed version of the image.
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