公开(公告)号：US20160300957A1

公开(公告)日：2016-10-13

申请号：US15084802

申请日：2016-03-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaoyong LU ,  Zheng LIU ,  Xiaolong LI ,  Dong LI ,  Huijuan ZHANG ,  Liang SUN

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  H01L27/12

CPC classification number: H01L29/78675 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L2029/7863

Abstract: The embodiments of the present invention disclose a low temperature (LTPS) transistor array substrate and a method of fabricating the same, and a display device. The LTPS transistor array substrate comprises a substrate; a poly-silicon semiconductor active region provided on the substrate; agate insulated from the poly-silicon semiconductor active region; and a dielectric spacer region provided on a side wall of the gate, wherein a portion of the poly-silicon semiconductor active region corresponding to the dielectric spacer region comprises a buffer region, and the dielectric spacer region surrounds the side wall of the gate and covers the buffer region.

Abstract translation: 本发明的实施例公开了低温（LTPS）晶体管阵列基板及其制造方法以及显示装置。 LTPS晶体管阵列基板包括基板; 设置在所述基板上的多晶硅半导体有源区; 与多晶硅半导体有源区绝缘的玛瑙; 以及设置在所述栅极的侧壁上的电介质间隔区，其中与所述电介质间隔区相对应的所述多晶硅半导体有源区的一部分包括缓冲区，并且所述电介质间隔区围绕所述栅极的侧壁 缓冲区。