公开(公告)号：US20120054708A1

公开(公告)日：2012-03-01

申请号：US12870624

申请日：2010-08-27

申请人： Charles J. Alpert ,  John L. McCann ,  Gi-Joon Nam ,  Shyam Ramji ,  Taraneh Taghavi ,  Natarajan Viswanathan

发明人： Charles J. Alpert ,  John L. McCann ,  Gi-Joon Nam ,  Shyam Ramji ,  Taraneh Taghavi ,  Natarajan Viswanathan

IPC分类号： G06F17/50

CPC分类号： G06F17/5072

摘要： A global placer receives a plurality of regions, each region occupying a sub-area of a design area. receives a plurality of movebound objects, each movebound object associated with a region. The global placer receives a plurality of unconstrained objects, each unconstrained object associated with no region. The global placer receives a tolerance, wherein the placement tolerance defines a coronal fringe to at least one region. The global placer initially placing the plurality of movebound objects and unconstrained objects. The global placer iterates over objects without preference to region-affiliation to select an object, wherein the objects are comprised of the plurality of movebound objects and plurality of unconstrained objects. The global placer determines whether movebound object is within the tolerance of a region associated with the movebound object.

摘要翻译： 全局放置器接收多个区域，每个区域占据设计区域的子区域。 接收多个移动对象，每个移动对象与一个区域相关联。 全局放置器接收多个无约束对象，每个无约束对象与无区域相关联。 全局放置器接收公差，其中放置公差将至少一个区域的冠状边缘定义。 全局放置器最初放置多个移动对象和非约束对象。 全局排列器迭代对象而不偏好区域属性来选择对象，其中对象由多个移动对象和多个无约束对象组成。 全局置位器确定移动对象是否在与移动对象相关联的区域的公差范围内。

公开(公告)号：US20090013299A1

公开(公告)日：2009-01-08

申请号：US12207498

申请日：2008-09-10

申请人： Charles J. Alpert ,  Tuhin Mahmud ,  Stephen T. Quay

发明人： Charles J. Alpert ,  Tuhin Mahmud ,  Stephen T. Quay

IPC分类号： G06F17/50

CPC分类号： G06F17/509 ,  G06F2217/84

摘要： Wirelength in a net of an integrated circuit design is reduced by forming clusters of sinks to be interconnected, inserting a buffer at each cluster, and providing branch connections between clusters by connecting a sink of one cluster to a buffer of another cluster, to create a buffer tree spanning all sinks. The buffers are inserted at a point on a respective bounding box of a cluster that is closest to a source for the net. A sink that provides a branch connection to the buffer of another cluster is the closest sink to that buffer (except for those sinks in the cluster). Clusters may be formed by examining different pairs of the sinks with different bounding boxes, and identifying one of the pairs whose bounding box has a lowest half-perimeter as the best pair for clustering.

摘要翻译： 集成电路设计网络中的线长通过形成要互连的接收集群，在每个集群中插入缓冲区并通过将一个集群的接收器连接到另一个集群的缓冲区来提供集群之间的分支连接来减少，以创建一个 跨越所有水槽的缓冲树。 缓冲区被插入到最靠近网络源的簇的相应边界框上的点处。 提供与另一个群集的缓冲区的分支连接的宿是与该缓冲区最接近的宿（除了群集中的那些宿）。 可以通过用不同的边界框检查不同对的汇，并且将其边界框中具有最小半周的对中的一个作为聚类的最佳对来形成群集。

公开(公告)号：US20080066037A1

公开(公告)日：2008-03-13

申请号：US11531322

申请日：2006-09-13

申请人： Charles J. Alpert ,  Gi-Joon Nam ,  Haoxing Ren ,  Paul G. Villarrubia ,  Natarajan Viswanathan

发明人： Charles J. Alpert ,  Gi-Joon Nam ,  Haoxing Ren ,  Paul G. Villarrubia ,  Natarajan Viswanathan

IPC分类号： G06F17/50

CPC分类号： G06F17/5072

摘要： A method of force directed placement programming is presented. The method includes sorting objects of a netlist for placement by magnitude of their spreading force and selecting a plurality of the objects. The method further includes waiving (or nullifying) the spreading force for the selected objects in a subsequent non-linear program solver step of the force directed placement program. The positions of the objects after the subsequent non-linear program solver step are based only on their connections to other objects in the netlist. The selected objects no longer retain their relative ordering as obtained during a previous non-linear program solve step of the force directed placement program. An alternative method of force directed placement programming is also present, which includes identifying objects from a netlist for placement that have a very high spreading force magnitude. The method further includes controlling the spreading force magnitude for the objects identified in the force directed placement programming to reduce wirelength in a chip design without sacrificing spreading of the objects.

摘要翻译： 提出了一种强制定向布置程序的方法。 该方法包括对网表的对象进行排序，以便按照其展开力的大小进行放置并选择多个对象。 该方法还包括在力定向放置程序的随后非线性程序解算器步骤中放弃（或消除）所选对象的展开力。 在后续非线性程序求解器步骤之后的对象的位置仅基于它们与网表中其他对象的连接。 所选择的对象不再保留在力定向放置程序的先前非线性程序解决步骤中获得的相对排序。 还存在一种替代的力定向放置编程的方法，其包括从具有非常高的铺展力量级的用于放置的网表识别对象。 该方法还包括控制在力定向放置编程中识别的物体的展开力大小以减少芯片设计中的线长度，而不牺牲物体的扩展。

公开(公告)号：US20070271543A1

公开(公告)日：2007-11-22

申请号：US11383544

申请日：2006-05-16

申请人： Charles J. Alpert ,  Tuhin Mahmud ,  Stephen T. Quay

发明人： Charles J. Alpert ,  Tuhin Mahmud ,  Stephen T. Quay

IPC分类号： G06F17/50

CPC分类号： G06F17/509 ,  G06F2217/84

摘要： Wirelength in a net of an integrated circuit design is reduced by forming clusters of sinks to be interconnected, inserting a buffer at each cluster, and providing branch connections between clusters by connecting a sink of one cluster to a buffer of another cluster, to create a buffer tree spanning all sinks. The buffers are inserted at a point on a respective bounding box of a cluster that is closest to a source for the net. A sink that provides a branch connection to the buffer of another cluster is the closest sink to that buffer (except for those sinks in the cluster). Clusters may be formed by examining different pairs of the sinks with different bounding boxes, and identifying one of the pairs whose bounding box has a lowest half-perimeter as the best pair for clustering.

摘要翻译： 集成电路设计网络中的线长通过形成要互连的接收集群，在每个集群中插入缓冲区并通过将一个集群的接收器连接到另一个集群的缓冲区来提供集群之间的分支连接来减少，以创建一个 跨越所有水槽的缓冲树。 缓冲区被插入到最靠近网络源的簇的相应边界框上的点处。 提供与另一个群集的缓冲区的分支连接的宿是与该缓冲区最接近的宿（除了群集中的那些宿）。 可以通过用不同的边界框检查不同对的汇，并且将其边界框中具有最小半周的对中的一个作为聚类的最佳对来形成群集。

公开(公告)号：US08595675B1

公开(公告)日：2013-11-26

申请号：US13539428

申请日：2012-06-30

申请人： Charles J. Alpert ,  Myung-Chul Kim ,  Gi-Joon Nam ,  Shyam Ramji ,  Natarajan Viswanathan

发明人： Charles J. Alpert ,  Myung-Chul Kim ,  Gi-Joon Nam ,  Shyam Ramji ,  Natarajan Viswanathan

IPC分类号： G06F9/455 ,  G06F17/50

CPC分类号： G06F17/5072

摘要： A global placement phase of physical design of an integrated circuit includes iteratively spreading a plurality of modules comprising the integrated circuit within a die area based on density of the plurality of modules and optimizing module placement by preserving global module density while improving a local objective, such as local wirelength and/or local density, in individual subareas among a plurality of subareas of the die area. After global placement, detailed placement of modules in the plurality of subareas is performed.

摘要翻译： 集成电路的物理设计的全局放置阶段包括基于多个模块的密度迭代地扩展包含该集成电路的多个模块，并且通过保持全局模块密度来优化模块放置，同时改善本地目标，例如 作为模具区域的多个子区域中的各个子区域中的局部线长度和/或局部密度。 在全局放置之后，执行在多个子区域中的模块的详细放置。

公开(公告)号：US07484199B2

公开(公告)日：2009-01-27

申请号：US11383544

申请日：2006-05-16

申请人： Charles J. Alpert ,  Tuhin Mahmud ,  Stephen T. Quay

发明人： Charles J. Alpert ,  Tuhin Mahmud ,  Stephen T. Quay

IPC分类号： G06F17/50

CPC分类号： G06F17/509 ,  G06F2217/84

摘要： Wirelength in a net of an integrated circuit design is reduced by forming clusters of sinks to be interconnected, inserting a buffer at each cluster, and providing branch connections between clusters by connecting a sink of one cluster to a buffer of another cluster, to create a buffer tree spanning all sinks. The buffers are inserted at a point on a respective bounding box of a cluster that is closest to a source for the net. A sink that provides a branch connection to the buffer of another cluster is the closest sink to that buffer (except for those sinks in the cluster). Clusters may be formed by examining different pairs of the sinks with different bounding boxes, and identifying one of the pairs whose bounding box has a lowest half-perimeter as the best pair for clustering.

摘要翻译： 集成电路设计网络中的线长通过形成要互连的接收集群，在每个集群中插入缓冲区并通过将一个集群的接收器连接到另一个集群的缓冲区来提供集群之间的分支连接来减少，以创建一个 跨越所有水槽的缓冲树。 缓冲区被插入到最靠近网络源的簇的相应边界框上的点处。 提供与另一个群集的缓冲区的分支连接的宿是与该缓冲区最接近的宿（除了群集中的那些宿）。 可以通过用不同的边界框检查不同对的汇，并且将其边界框中具有最小半周的对中的一个作为聚类的最佳对来形成群集。

公开(公告)号：US07467369B2

公开(公告)日：2008-12-16

申请号：US11554235

申请日：2006-10-30

申请人： Charles J. Alpert ,  Gi-Joon Nam ,  Haoxing Ren ,  Paul G. Villarrubia

发明人： Charles J. Alpert ,  Gi-Joon Nam ,  Haoxing Ren ,  Paul G. Villarrubia

IPC分类号： G06F17/50 ,  G06F9/45

CPC分类号： G06F17/5072

摘要： The illustrative embodiments provide a computer implemented method which perform cell transforms that decrease overall wire length, without degrading device timing or violating electrical constraints. The process computes delay constraint coefficients for a data set. The process performs a detailed placement transform by moving a subset of cells, making the placement legal, computing a half perimeter wire length change for each output net that is a member of the subset of nets, and computing a Manhattan distance change for each source-sink gate pair within the move cells. the process computes a weighted total wire length incremented value for the transformed data set. Further, the process continues by evaluating arrival time constraints, electrical constraints, and user configurable move limits for violations, and restoring the move cells to the original placement if a violation is found.

摘要翻译： 说明性实施例提供了一种计算机实现的方法，其执行减小总线长度的小区变换，而不降低设备定时或违反电气约束。 该过程计算数据集的延迟约束系数。 该过程通过移动单元的子集来执行详细的放置变换，使得放置合法，计算作为网络子集成员的每个输出网的半周长线长度变化，以及计算每个源 - 移动细胞内的宿闸对。 该过程计算用于变换数据集合的加权总线长度递增值。 此外，该过程通过评估抵达时间约束，电气约束和用户可配置的违规移动限制，以及如果发现违规，则将移动单元恢复到原始位置继续。

公开(公告)号：US20080282213A1

公开(公告)日：2008-11-13

申请号：US12181447

申请日：2008-07-29

申请人： Charles J. Alpert ,  Gi-Joon Nam ,  Haoxing Ren ,  Paul G. Villarrubia ,  Natarajan Viswanathan

发明人： Charles J. Alpert ,  Gi-Joon Nam ,  Haoxing Ren ,  Paul G. Villarrubia ,  Natarajan Viswanathan

IPC分类号： G06F17/50

CPC分类号： G06F17/5072

摘要： A method of force directed placement programming is presented. The method includes: assigning a plurality of objects from a cell netlist to bins; shifting the objects based on the bins; computing a magnitude of a spreading force for each object of the plurality of objects based on the shifting; sorting the objects based on the magnitude of the spreading force of the objects; selecting a subset of the sorted objects based on a threshold value indicating at least one of a top percentage, a threshold force, and a threshold value that is based on a placement congestion; adjusting the spreading force of the selected objects to be equal to a predetermined value indicating a minimum spreading force; and determining a placement of the objects based on adjusted spreading force of the selected objects.

摘要翻译： 提出了一种强制定向布置程序的方法。 该方法包括：将多个对象从小区网表分配给分组; 基于箱子移动物体; 基于所述移动来计算所述多个对象中的每个对象的扩展力的大小; 基于物体的展开力的大小对物体进行分类; 基于指示基于位置拥塞的最高百分比，阈值力和阈值中的至少一个的阈值来选择排序对象的子集; 将所选择的物体的展开力调整为等于表示最小铺展力的预定值; 以及基于所选择的对象的调整的展开力确定所述对象的位置。

公开(公告)号：US20080127017A1

公开(公告)日：2008-05-29

申请号：US11554235

申请日：2006-10-30

申请人： Charles J. Alpert ,  Gi-Joon Nam ,  Haoxing Ren ,  Paul G. Villarrubia

发明人： Charles J. Alpert ,  Gi-Joon Nam ,  Haoxing Ren ,  Paul G. Villarrubia

IPC分类号： G06F17/50

CPC分类号： G06F17/5072

摘要： A computer implemented method and a computer program product which perform cell transforms that decrease overall wire length, without degrading device timing or violating electrical constraints. The process computes delay constraint coefficients for a data set. The process performs a detailed placement transform by moving a subset of cells, making the placement legal, computing a half perimeter wire length change for each output net that is a member of the subset of nets, and computing a Manhattan distance change for each source-sink gate pair within the move cells. The process computes a weighted total wire length incremented value for the transformed data set, if the move will not improve placement, the move transform is not allowed. Further, the process continues by evaluating arrival time constraints, electrical constraints and user configurable move limits for violations, restoring the move cells to the original placement if a violation is found.

摘要翻译： 一种计算机实现的方法和一种计算机程序产品，其执行减少总线长度的小区变换，而不会降低设备定时或违反电气限制。 该过程计算数据集的延迟约束系数。 该过程通过移动单元的子集来执行详细的放置变换，使得放置合法，计算作为网络子集成员的每个输出网的半周长线长度变化，以及计算每个源 - 移动细胞内的宿闸对。 该过程计算变换数据集的加权总线长度递增值，如果移动不会改善放置，则不允许移动变换。 此外，该过程通过评估到达时间约束，电气约束和用户可配置的违规移动限制来继续，如果发现违规，则将移动单元恢复到原始位置。

公开(公告)号：US08769457B2

公开(公告)日：2014-07-01

申请号：US13539440

申请日：2012-06-30

申请人： Charles J. Alpert ,  Myung-Chul Kim ,  Gi-Joon Nam ,  Shyam Ramji ,  Natarajan Viswanathan

发明人： Charles J. Alpert ,  Myung-Chul Kim ,  Gi-Joon Nam ,  Shyam Ramji ,  Natarajan Viswanathan

IPC分类号： G06F17/50

CPC分类号： G06F17/5072

摘要： After a global placement phase of physical design of an integrated circuit, a data processing system iteratively refines local placement of a plurality of modules comprising the integrated circuit within a die area based on density of the plurality of modules and separately refines local wirelength for the plurality of modules in individual subareas among a plurality of subareas of the die area. The data processing system thereafter performs detailed placement of modules in the plurality of subareas.

摘要翻译： 在集成电路的物理设计的全局放置阶段之后，数据处理系统基于多个模块的密度迭代地将包括该集成电路的多个模块的本地放置精细化，并单独地对多个模块中的局部线长进行精细化 在模具区域的多个子区域中的各个子区域中的模块。 此后，数据处理系统在多个子区域中执行模块的详细布置。