-
公开(公告)号:US07925686B2
公开(公告)日:2011-04-12
申请号:US11311971
申请日:2005-12-19
CPC分类号: G06J1/00
摘要: A first device is described. The first device may include a linear transformation circuit to implement multiplication by a matrix D. The linear transformation circuit may have an input to receive a vector having N digital values and an output to output N first output signals, a sign-adjustment circuit to adjust signs of a subset including at least M of the N first output signals in accordance with a set of coefficients H, and a conversion (DAC) circuit coupled to the sign-adjustment circuit. Outputs from the DAC circuit may be summed to produce an output.
摘要翻译: 描述第一设备。 第一装置可以包括线性变换电路以实现矩阵D的乘法。线性变换电路可以具有用于接收具有N个数字值的矢量的输入和用于输出N个第一输出信号的输出,用于调整的符号调整电路 根据一组系数H包括至少N个N个第一输出信号的子集的符号,以及耦合到符号调整电路的转换(DAC)电路。 来自DAC电路的输出可以相加以产生输出。
-
公开(公告)号:US20100290481A1
公开(公告)日:2010-11-18
申请号:US12679975
申请日:2008-08-29
申请人: Aliazam Abbasfar
发明人: Aliazam Abbasfar
IPC分类号: H04B7/216
CPC分类号: H04L25/4908 , H04L7/041
摘要: Embodiments of an encoder and a decoder are described. The encoder encodes data into a series of parallel codewords. Each codeword is expressed two sets of logic values (e.g., a set of logic 0s and a set of logic 1s) on two corresponding sets of output nodes, a first set and a second set. The encoder selects a current codeword such that it differs from the immediately preceding codeword by a fixed number of zero-to-one transitions on the first set of nodes and a fixed number of one-to-zero transitions on the second set of nodes. A decoder receives and decodes the codewords by comparing symbols on node pairs for which the symbols expressed in the prior code word were alike and decoding the results of those comparisons.
摘要翻译: 描述了编码器和解码器的实施例。 编码器将数据编码成一系列并行码字。 每个码字在两个对应的输出节点组,第一组和第二组上表示两组逻辑值(例如,一组逻辑0和一组逻辑1)。 编码器选择当前码字,使得其与紧接在前的码字不同,第一组节点上的固定数量的零到一个转换和第二组节点上的固定数量的一到零转换。 解码器通过比较在先前代码字中表示的符号相似的节点对上的符号并对这些比较的结果进行解码来接收和解码码字。
-
公开(公告)号:US20100202565A1
公开(公告)日:2010-08-12
申请号:US12679764
申请日:2008-04-29
申请人: Aliazam Abbasfar
发明人: Aliazam Abbasfar
CPC分类号: H04L27/22 , H04B1/16 , H04L27/2014 , H04L27/2082
摘要: Embodiments of a circuit are described. In this circuit, a modulation circuit provides a first modulated electrical signal and a second modulated electrical signal, where a given modulated electrical signal, which can be either the first modulated electrical signal or the second modulated electrical signal, includes minimum-shift keying (MSK) modulated data. Moreover, a first phase-adjustment element, which is coupled to the modulation circuit, sets a relative phase between the first modulated electrical signal and the second modulated electrical signal based on a phase value of the first phase-adjustment element. Additionally, an output interface, which is coupled to the first phase-adjustment element, is coupled to one or more antenna elements which output signals. These signals include a quadrature phase-shift-keying (QPSK) signal corresponding to the first modulated electrical signal and the second modulated electrical signal.
摘要翻译: 描述电路的实施例。 在该电路中,调制电路提供第一调制电信号和第二调制电信号,其中可以是第一调制电信号或第二调制电信号的给定调制电信号包括最小位移键控(MSK )调制数据。 此外,耦合到调制电路的第一相位调整元件基于第一相位调整元件的相位值来设定第一调制电信号和第二调制电信号之间的相对相位。 另外,耦合到第一相位调整元件的输出接口耦合到输出信号的一个或多个天线元件。 这些信号包括对应于第一调制电信号和第二调制电信号的正交相移键控(QPSK)信号。
-
公开(公告)号:US20080310491A1
公开(公告)日:2008-12-18
申请号:US12117680
申请日:2008-05-08
申请人: Aliazam Abbasfar , Amir Amirkhany
发明人: Aliazam Abbasfar , Amir Amirkhany
CPC分类号: H04L27/0008
摘要: A multi-mode transmitter within an integrated circuit device. The multi-mode transmitter transmits a first data sequence in a baseband signal when a first transmission mode is enabled, and transmits the first data sequence in a multi-band signal when a second transmission mode is enabled.
摘要翻译: 集成电路设备内的多模发射机。 当第一传输模式被使能时,多模式发射机发送基带信号中的第一数据序列,并且当启用第二传输模式时,将多个第一数据序列发送到多频带信号。
-
公开(公告)号:US20070143387A1
公开(公告)日:2007-06-21
申请号:US11311971
申请日:2005-12-19
IPC分类号: G06F17/14
CPC分类号: G06J1/00
摘要: A first device is described. The first device may include a linear transformation circuit to implement multiplication by a matrix D. The linear transformation circuit may have an input to receive a vector having N digital values and an output to output N first output signals, a sign-adjustment circuit to adjust signs of a subset including at least M of the N first output signals in accordance with a set of coefficients H, and a conversion (DAC) circuit coupled to the sign-adjustment circuit. Outputs from the DAC circuit may be summed to produce an output.
摘要翻译: 描述第一设备。 第一装置可以包括线性变换电路以实现矩阵D的乘法。线性变换电路可以具有用于接收具有N个数字值的矢量的输入和用于输出N个第一输出信号的输出,用于调整的符号调整电路 根据一组系数H包括至少N个N个第一输出信号的子集的符号,以及耦合到符号调整电路的转换(DAC)电路。 来自DAC电路的输出可以相加以产生输出。
-
-
-
-