公开(公告)号：US06804134B1

公开(公告)日：2004-10-12

申请号：US10410569

申请日：2003-04-09

Applicant: Robert J. Proebsting ,  Scott Yu-Fan Chu ,  Kee Park

Inventor： Robert J. Proebsting ,  Scott Yu-Fan Chu ,  Kee Park

IPC: G11C1500

CPC classification number: G11C15/00

Abstract: Content addressable memory (CAM) devices include at least one CAM array that is configured to identify at least one match between a new search word and entries therein by performing a staged compare operation that conserves bit line power by initially floating at least some of a plurality of bit lines in said CAM array and then driving the at least some of a plurality of bit lines with second bits of the new search word in response to detecting at least one partial match between first bits of the new search word and the entries in said CAM array.

Abstract translation: 内容可寻址存储器（CAM）设备包括至少一个CAM阵列，其被配置为通过执行通过初始漂移多个的至少一些来暂时保持位线功率的分级比较操作来识别新的搜索词与其中的条目之间的至少一个匹配 并且然后响应于检测到新搜索词的第一位与所述新搜索词中的条目之间的至少一个部分匹配而在新搜索词的第二位中驱动多个位线中的至少一些位线 CAM阵列。

公开(公告)号：US06760242B1

公开(公告)日：2004-07-06

申请号：US10323236

申请日：2002-12-18

Applicant: Kee Park ,  Scott Yu-Fan Chu

Inventor： Kee Park ,  Scott Yu-Fan Chu

IPC: G11C1500

CPC classification number: G11C15/00

Abstract: Content addressable memory (CAM) devices according to embodiments of the present invention conserve match line and bit line power when CAM array blocks therein are searched. These CAM array blocks are searched in a pipelined segment-to-segment manner to increase search speed. The pipelined search operations may also be interleaved with write and read operations in an efficient manner that reduces the occurrence of pipeline bubbles.

Abstract translation: 根据本发明的实施例的内容可寻址存储器（CAM）设备在搜索CAM阵列块时保存匹配线和位线功率。 这些CAM阵列块以流水线段到段的方式进行搜索，以提高搜索速度。 流水线搜索操作还可以以有效的方式与写入和读取操作交错，从而减少管道气泡的发生。

公开(公告)号：US06549452B1

公开(公告)日：2003-04-15

申请号：US10032269

申请日：2001-12-20

Applicant: Kee Park

Inventor： Kee Park

IPC: G11C1100

CPC classification number: G11C11/418

Abstract: A method for accessing an SRAM cell includes: determining whether an access is a read access or write access, applying a read word line pulse having a first width to a word line if the access is a read access, and applying a write word line pulse having a second width to the word line if the access is a write access, wherein the first and second widths are different. The method can further include: pre-charging a bit line pair of the SRAM cell for a first pre-charge period after de-asserting the read word line pulse, and pre-charging the bit line pair for a second pre-charge period after de-asserting the write word line pulse, wherein the first and second pre-charge periods are different. The cycle time of the SRAM cell is reduced by providing word line pulses having only the necessary widths and pre-charge operations having only the necessary periods.

Abstract translation: 用于访问SRAM单元的方法包括：确定访问是读访问还是写访问，如果访问是读访问，则将具有第一宽度的读字字脉冲应用于字线，以及施加写字线脉冲 如果所述访问是写访问，则对所述字线具有第二宽度，其中所述第一和第二宽度不同。 该方法还可以包括：在解除读取的字线脉冲之后，对第一预充电周期之后的第一预充电周期预先给SRAM单元进行预充电，以及在位线对之后对第二预充电周期进行预充电， 取消断言写入字线脉冲，其中第一和第二预充电周期是不同的。 通过提供仅具有必要宽度的字线脉冲和仅具有必要周期的预充电操作来减小SRAM单元的周期时间。