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51.
公开(公告)号:US20190131972A1
公开(公告)日:2019-05-02
申请号:US16008955
申请日:2018-06-14
Applicant: Micron Technology, Inc.
Inventor: Dean Gans
Abstract: Apparatuses and methods for identifying memory devices of a semiconductor device sharing an external resistance are disclosed. A memory device of a semiconductor device may be set in an identification mode and provide an identification request to other memory devices that are coupled to a common communication channel. The memory devices that are coupled to the common communication channel may share an external resistance, for example, for calibration of respective programmable termination components of the memory devices. The memory devices that receive the identification request set a respective identification flag which can be read to determine which memory devices share an external resistance with the memory device having the set identification mode.
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52.
公开(公告)号:US20180247689A1
公开(公告)日:2018-08-30
申请号:US15968297
申请日:2018-05-01
Applicant: Micron Technology, Inc.
Inventor: Dean Gans
IPC: G11C11/4074
CPC classification number: G11C11/4074 , G11C11/4076 , G11C2207/2227
Abstract: According to one embodiment, an apparatus is disclosed. The apparatus includes a first power supply having a first fixed voltage, a second power supply having a second fixed voltage, a plurality of circuits coupled to the first power supply via a first switch and the second power supply via a second switch, and a power control circuit configured to selectively enable one of the first switch and the second switch responsive to power demand information.
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53.
公开(公告)号:US09978437B2
公开(公告)日:2018-05-22
申请号:US15366198
申请日:2016-12-01
Applicant: Micron Technology, Inc.
Inventor: Dean Gans
IPC: G11C5/14 , G11C11/4074 , G11C11/4076
CPC classification number: G11C11/4074 , G11C11/4076 , G11C2207/2227
Abstract: According to one embodiment, an apparatus is disclosed. The apparatus includes a first power supply having a first fixed voltage, a second power supply having a second fixed voltage, a plurality of circuits coupled to the first power supply via a first switch and the second power supply via a second switch, and a power control circuit configured to selectively enable one of the first switch and the second switch responsive to power demand information.
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