公开(公告)号：US06693466B2

公开(公告)日：2004-02-17

申请号：US10293563

申请日：2002-11-14

申请人： Takahiro Inoue ,  Naruichi Yokogawa ,  Takeshi Nishino

发明人： Takahiro Inoue ,  Naruichi Yokogawa ,  Takeshi Nishino

IPC分类号： H03K5153

CPC分类号： H03K5/2418 ,  H03K3/02337 ,  H03K3/2897

摘要： The present invention has an object to control easily the pulse width of an output by operating a limiting circuit appropriately even if the power voltage is low. A limiting circuit is provided on the input side of a hysteresis comparator circuit to prevent saturation. A limit voltage Vlimit is set by a bias circuit so as to change in accordance with the operation of the hysteresis comparator circuit. When an input voltage Vsig exceeds a hysteresis threshold voltage Vth, the limit voltage Vlimit is dropped in response to a drop of the hysteresis threshold voltage Vth. Thus, the width of the pulse width can be controlled while maintaining the condition that the limit voltage Vlimit is higher than the hysteresis threshold voltage Vth.

摘要翻译： 本发明的目的是即使电源电压低，也可以适当地操作限制电路来容易地控制输出的脉冲宽度。 在滞环比较器电路的输入侧提供限制电路以防止饱和。 极限电压Vlimit由偏置电路设置，以便根据滞后比较器电路的操作而改变。 当输入电压Vsig超过滞后阈值电压Vth时，极限电压Vlimit响应于滞后阈值电压Vth的下降而下降。 因此，可以控制脉冲宽度的宽度，同时保持极限电压Vlimit高于滞后阈值电压Vth的条件。