Abstract:
An in-cell touch display panel structure includes upper and lower substrates, a black matrix layer, a thin film transistor and sensing electrode layer including a gate line sub-layer and a source line sub-layer. The gate line sub-layer includes plural gate lines and plural first sensing conductor segments. The source line sub-layer includes plural source lines and plural second sensing conductor segments. The first and second sensing conductor segments are disposed corresponding to positions of opaque lines of the black matrix layer. The second sensing conductor segments are divided into a first group including plural second sensing conductor segments and a second group including plural second sensing conductor segments. The second sensing conductor segments of the first group and the first sensing conductor segments are formed with N quadrilateral regions, where N is a positive integer and any two quadrilateral regions are not connected with each other.
Abstract:
An in-cell OLED touch panel structure of narrow border includes an upper substrate, a lower substrate, an OLED layer configured between the upper and lower substrates, a black matrix layer, a first sensing electrode layer, a second sensing electrode layer, and a thin film transistor layer. The black matrix layer is composed of a plurality of opaque lines. The first sensing electrode layer includes M first conductor line units and N connection lines. The second sensing electrode layer includes N second conductor line units. Each second conductor line unit makes use of a corresponding i-th connection line to be extended to one edge of the in-cell OLED touch panel structure. The M first conductor line units, the N connection lines, and the N second conductor line units are disposed at positions corresponding to those of the plurality of opaque lines of the black matrix layer.
Abstract:
A high-accuracy in-cell touch panel structure of narrow border includes an upper substrate, a lower substrate, a liquid crystal layer configured between the upper and lower substrates, a thin film transistor layer, a sensing electrode layer, and a black matrix layer. The thin film transistor layer includes a plurality of gate lines, a plurality of source lines, and a plurality of first conductor line units arranged in a first direction. The sensing electrode layer includes plural second conductor line units and plural connection lines arranged in a second direction. The plurality of first conductor line units and the plurality of second conductor line units form a sensing touch pattern structure for sensing an approaching external object. The plurality of first conductor line units and the plurality of second conductor line units are disposed corresponding to positions of the plurality of gate lines and the plurality of source lines.
Abstract:
A high-accuracy OLED touch display panel structure includes an upper substrate, a lower substrate, an OLED layer configured between the upper and lower substrates, a sensing electrode layer, a thin film transistor and wiring layer, a cathode layer, and an anode layer. The sensing electrode layer has a plurality of sensing conductor lines for sensing an approaching external object. The thin film transistor and wiring layer includes a plurality of gate lines, a plurality of source lines, and a plurality of wirings. The plurality of sensing conductor lines are disposed corresponding to positions of the plurality of gate lines and the plurality of source lines.
Abstract:
A touch panel device with reconfigurable sensing points includes a panel, a plurality of sensing points, a plurality of selectors, and a controller. The sensing points, are arranged on the panel for sensing a touch generated from an external object and generating a corresponding signal. Each selector has a first terminal connected to a corresponding sensing point, a second terminal connected to a common output terminal, and a control terminal. The controller is connected to the control terminal of each selector for controlling the plurality of selectors to be electrically connected to the common output terminal or not. The controller configures the control terminals of the plurality of selectors to allow some of the sensing points to be electrically connected to the common output terminal, so as to proceed with a hierarchical block touch sensing.
Abstract:
An in-cell touch display panel system includes: first and second substrates configured therebetween a liquid crystal layer, a black matrix layer, a sensing electrode trace layer, an insulation layer, and a sensing electrode layer. The black matrix layer is composed of a plurality of opaque lines. The sensing electrode trace layer is composed of a plurality of trace conductor lines. The insulation layer is disposed on one surface of the sensing electrode trace layer facing the liquid crystal layer. The sensing electrode layer is composed of a plurality of transparent sensing electrodes obtained from patterning a common voltage layer. Each transparent sensing electrode is connected with at least one trace conductor line, while the plurality of trace conductor lines are disposed corresponding to positions of the plurality of opaque lines of the black matrix layer.
Abstract:
An in-cell touch display panel system with increased accuracy of touch positions includes a panel display unit, a touch unit, a display unit power supply, and a touch unit power supply. The display unit power supply has a power supply end and a ground end for supplying power to the panel display unit. The touch unit power supply has a first switch, a second switch and an energy storage device. The first switch has one end connected to the power supply end and the other end connected to one end of the energy storage device. The second switch has one end connected to the ground end and the other end connected to the other end of the energy storage device. When the touch unit performs a touching detection, the first and second switches disconnect the energy storage device from the power supply end and the ground end.
Abstract:
An electrophoresis display with improved micro partition structure includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, and an electrophoresis layer. The driving circuit layer, the control electrode layer, and the electrophoresis layer are sequentially arranged on the second face. The electrophoresis layer includes a micro partition structure arranged on the control substrate and made from polymer material. The micro partition structure includes a plurality of partition walls to define chambers for accommodating a colloidal solution. The height of the partition wall of the micro partition structure is smaller than 25 um.
Abstract:
An electrophoresis display with gapped micro partition structure includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, and an electrophoresis layer. The driving circuit layer, the control electrode layer, and the electrophoresis layer are sequentially arranged on the second face. The electrophoresis layer includes a micro partition structure arranged on the control substrate and made from polymer material. The micro partition structure includes a plurality of partition walls to define chambers for accommodating a colloidal solution. Two adjacent partition walls have a gap therebetween and used as yielding space when the electrophoresis display is bent. The area of the gap is not larger than 50% of the area of the partition wall. Or the length of the gap is not longer than 50% of the length of the partition wall.
Abstract:
An electrophoresis display with high aperture ratio includes a control substrate having a first face and a second face, a driving circuit layer, a control electrode layer, an electrophoresis layer, and an opposite substrate. The driving circuit layer includes a plurality of thin film transistors (TFT), a plurality of gate lines, and plurality of data lines. Each of the gate line is connected to the gates of the TFTs and each of the data lines is connected to the sources or the drains of the TFTs. The sum of the data line width and the gate line width is not larger than 10 μm. The aperture ratio of the electrophoresis display, viewed from the first face of the control substrate and toward a display area of the electrophoresis display, is not less than 80%.