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公开(公告)号：US20190206298A1
公开(公告)日：2019-07-04
申请号：US16298981
申请日：2019-03-11
发明人： Sangjin Jeon , Ilgon Kim , Dong-Won Park , Bonghyun You , Junki Jeong
IPC分类号： G09G3/20 , G02F1/1362 , G02F1/1343 , G09G3/36
CPC分类号： G09G3/20 , G02F1/134336 , G02F1/136286 , G02F2001/13456 , G02F2001/13629 , G09G3/3648 , G09G2300/0413 , G09G2300/0426 , G09G2300/0439 , G09G2310/0278
摘要： A display apparatus includes a display panel, a timing controller, a gate driver, and a data driver. The display panel includes a display area configured to display an image and a non-display area adjacent to a side of the display area in a first direction. The display area includes gate lines, data lines, gate dummy lines, data contact parts, and pixels. The data lines cross the gate lines and are insulated from at least a portion of the gate lines. The gate dummy lines are substantially in parallel to the gate lines and spaced from the gate lines. The data contact parts couple the gate dummy lines to the data lines at a side of the display panel in a second direction substantially perpendicular to the first direction. The pixels are coupled to the gate lines and the data lines.
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公开(公告)号：US20180329263A1
公开(公告)日：2018-11-15
申请号：US15578560
申请日：2017-05-26
发明人： Jingang Hao
IPC分类号： G02F1/1362 , H01L27/12 , G02F1/1368 , G02F1/1343
CPC分类号： G02F1/136204 , G02F1/134363 , G02F1/13439 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/13629 , G02F2001/136295 , G02F2001/13685 , G02F2201/121 , G02F2201/123 , H01L27/12 , H01L27/1244
摘要： An array substrate, a fabricating method thereof, and a related display device are provided. The method for forming an array substrate can comprises: forming a plurality of signal lines over a base substrate; forming a conductive line over the base substrate, the conductive line connecting at least two of the plurality of signal lines; forming an insulating layer over the base substrate, the plurality of signal lines, and the conductive line; forming a via hole through the insulating layer at a position over the conductive line and between the at least two of the plurality of signal lines; and removing a portion of the conductive line through the via hole to disconnect the conductive line.
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3.发明申请公开(公告)号：US20180307107A1
公开(公告)日：2018-10-25
申请号：US15492900
申请日：2017-04-20
申请人： a.u. Vista, Inc.
发明人： Seok-Lyul LEE , Fang-Chen LUO
IPC分类号： G02F1/1362 , G02F1/1339 , G02F1/1343 , G02F1/1335 , G02F1/1368
CPC分类号： G02F1/136286 , G02F1/133512 , G02F1/133514 , G02F1/13394 , G02F1/134309 , G02F1/1368 , G02F2001/13606 , G02F2001/13629 , G02F2001/13685 , G02F2201/121 , G02F2201/123
摘要： A display device using low capacitance bus lines having gate lines and data lines on different substrates. The display device includes a first substrate and a second substrate spaced apart from each other, and a liquid crystal layer is disposed in the cell gap between the first substrate and the second substrate. The data lines of the display device are formed on the first substrate, and the gate lines of the display device are formed on the second substrate. The data lines formed on the first substrate and the gate lines formed on the second substrate are spaced apart by a gate insulator layer and the liquid crystal layer, which increases the gap distance between the data lines and the gate lines. Accordingly, a cross capacitance between each of the data lines and each of the gate lines can be reduced.
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公开(公告)号：US20180231854A1
公开(公告)日：2018-08-16
申请号：US15896520
申请日：2018-02-14
申请人： Japan Display Inc.
发明人： Kayoko Miyazaki , Arihiro Takeda
IPC分类号： G02F1/1362 , G02F1/1368 , G02F1/1343
CPC分类号： G02F1/136286 , G02F1/134309 , G02F1/134363 , G02F1/1368 , G02F2001/134372 , G02F2001/136218 , G02F2001/13629 , G02F2001/136295 , G02F2201/121 , G02F2201/123
摘要： According to one embodiment, a display device including a conductive line, the conductive line including a first conductive layer including a first upper surface, the first upper surface including a first area above an end portion and a second area located on an internal side relative to the first area, and a second conductive layer including a lower portion including a lower surface which is in contact with the second area and an upper portion above the lower portion, wherein the end portion extends to an external side in comparison with the lower surface.
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公开(公告)号：US20180149939A1
公开(公告)日：2018-05-31
申请号：US15121927
申请日：2016-06-16
发明人： Xiangwei JIANG
IPC分类号： G02F1/1362 , G02F1/1368 , G02F1/1343 , H01L27/12
CPC分类号： G02F1/136286 , G02F1/134336 , G02F1/136227 , G02F1/13624 , G02F1/1368 , G02F2001/134318 , G02F2001/13629 , G02F2201/123 , H01L27/1218 , H01L27/124 , H01L27/1248 , H01L27/1255
摘要： A 3T pixel structure is provided. The 3T pixel structure includes: a substrate, on which a lower common electrode and a scan line are positioned; a first dielectric layer, positioned on the lower common electrode, the scan line and the substrate; a charge-sharing thin film transistor (TFT), including a source, a drain, and a gate, the source and the drain of the charge-sharing TFT being positioned on the first dielectric layer; a data line, positioned on the first dielectric layer; a second dielectric layer, positioned on the source, the drain, the data line of the charge-sharing TFT and the first dielectric layer; and an upper common electrode, positioned on the second dielectric layer. The second dielectric layer has a source hole to allow the upper common electric layer to contact the first source and electrically connect to the first source through the source hole.
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公开(公告)号：US20180108683A1
公开(公告)日：2018-04-19
申请号：US15784545
申请日：2017-10-16
发明人： Yong Chan Jeon , Pil Gyu Kang , Hyun-Woong Baek , Hyung Joo Jeon , Sol Ip Jeong , Jang-Bog Ju
CPC分类号： H01L27/1244 , G02F1/136204 , G02F1/136286 , G02F2001/13629 , H01L23/60 , H01L27/1255 , H01L27/3276 , H01L2251/5392
摘要： A display device includes: a first substrate; a second substrate facing the first substrate; a first electrode disposed on a first surface of the first substrate, the first surface facing the second substrate; a second electrode and a third electrode disposed along an edge of a second surface of the second substrate, the second surface facing the first surface of the first substrate; and a short electrode disposed between the first electrode and the second electrode and between the first electrode and the third electrode. the short electrode electrically connecting the first electrode, the second electrode, and the third electrode, wherein the second electrode and the third electrode are physically separated.
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公开(公告)号：US09946122B2
公开(公告)日：2018-04-17
申请号：US15448673
申请日：2017-03-03
发明人： Keunwoo Kim
IPC分类号： G02F1/136 , G02F1/1343 , H01L27/12 , G02F1/1362 , G02F1/1368
CPC分类号： G02F1/134309 , G02F1/133707 , G02F1/13624 , G02F1/136286 , G02F1/1368 , G02F2001/133757 , G02F2001/134345 , G02F2001/136236 , G02F2001/136245 , G02F2001/13629 , G02F2201/123 , G02F2202/10 , H01L27/124 , H01L27/1248 , H01L27/1251
摘要： A liquid crystal display device includes a first substrate spaced from a second substrate, a liquid crystal layer between the first and second substrates, a gate line, a data line, a first sub-pixel electrode, and a second sub-pixel electrode on the first substrate. The display device also includes a first switch and a second switch. The first switch is connected to the gate line, the data line, and the first sub-pixel electrode. The second switch is connected to the gate line, the data line, and the second sub-pixel electrode. The second switch includes a first gate electrode connected to the gate line and a second gate electrode not connected to the gate line.
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公开(公告)号：US20180069128A1
公开(公告)日：2018-03-08
申请号：US15686415
申请日：2017-08-25
发明人： Hyun Eok Shin , Sang Won Shin , Dong Min Lee , Ju Hyun Lee , Shin Il Choi
IPC分类号： H01L29/786 , H01L27/12
CPC分类号： H01L29/78633 , G02F1/136209 , G02F1/136286 , G02F1/1368 , G02F2001/13629 , G02F2001/136295 , H01L27/124 , H01L27/1262 , H01L27/3262 , H01L27/3272 , H01L27/3276 , H01L2227/323 , H01L2251/5315 , H01L2251/533
摘要： A display device according to an exemplary embodiment of the present invention includes: a substrate; a gate line and a data line that are provided on the substrate and are insulated from each other; a thin film transistor that is connected with the gate line and the data line; and a pixel electrode that is connected with the thin film transistor, in which at least one of the gate line and the data line includes a metal layer and a blocking layer that contacts the metal layer, and the blocking layer includes a first metal from a first group including molybdenum (Mo) and tungsten (W), a second metal from a second group including vanadium (V), niobium (Nb), zirconium (Zr), and tantalum (Ta), and oxygen (O).
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公开(公告)号：US09910330B2
公开(公告)日：2018-03-06
申请号：US14663358
申请日：2015-03-19
发明人： Chul-Won Park , Hoon Kang , Koichi Sugitani , Jin-Ho Ju
IPC分类号： G02F1/1341 , G02F1/1362 , G02F1/1343 , G02F1/1368 , G02F1/1335 , G02F1/1339
CPC分类号： G02F1/136227 , G02F1/133512 , G02F1/133514 , G02F1/1339 , G02F1/1341 , G02F1/134363 , G02F1/136286 , G02F1/1368 , G02F2001/134372 , G02F2001/13629
摘要： In a display panel, a thin film transistor is connected to a gate line and a data line, and includes a gate electrode, a semiconductor pattern, a source electrode and a drain electrode. An organic pattern makes contact with a side surface of the data line and a side surface of the thin film transistor, and the organic pattern overlaps pixel areas of the display panel. A first passivation layer is on the data line, the thin film transistor and the organic pattern. A common electrode is on the first passivation layer, and the common electrode overlaps the pixel areas. A second passivation layer covers the common electrode. A pixel electrode is on the second passivation layer, the pixel electrode overlaps the common electrode, and the pixel electrode is electrically connected to the drain electrode through a first contact hole and the data line through a second contact hole.
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公开(公告)号：US09899426B2
公开(公告)日：2018-02-20
申请号：US15215378
申请日：2016-07-20
申请人： Apple Inc.
CPC分类号： H01L27/124 , G02F1/136286 , G02F2001/13606 , G02F2001/13629 , G02F2201/40 , G09G3/3659 , G09G2300/0426 , G09G2300/0819 , G09G2320/0219
摘要： Display backplanes and pixel element structures are described. In an embodiment, a pixel electrode is located between two stacked data lines, with a left edge of the pixel electrode being separated from a first lower data line by approximately a same distance as a right edge of the pixel electrode is separated from a second lower data line.
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