摘要:
Disclosed is an integrated electronic circuit comprising a core circuit that generates a useful signal as well as a buffer for storing the useful signal. The buffer stores the last read value of the useful signal for a predetermined period of time when the power supply is interrupted, and the buffer is disconnected from the power supply of the other circuits.
摘要:
In a conventional reactive-power compensator using a static reactive-power compensator (SVC), there are many cases in which the SVC is operating in a state in which it generates an amount of reactive power equivalent to a large part of its capacity. When an unforeseen large voltage fluctuation occurs in this state, the SVC can not sufficiently generate the amount of reactive power required to mitigate the voltage fluctuation. In some cases, such a voltage fluctuation can not be brought under control. To address this situation, a reactive-power compensator utilizes a reactive-power control apparatus that includes a comparison voltage generator for generating, for a control target voltage and to mitigate voltage fluctuation, a comparison voltage restricted within predetermined limits and obeying a predetermined time-lag characteristic. A differential voltage generator generates a differential voltage that is the difference between the comparison voltage and the control target voltage. A reactive-power control device controls, in response to the differential voltage, control-target reactive power generated by an SVC, at a time-related characteristic faster than the time-lag characteristic for the comparison voltage.