公开(公告)号：US08138750B2

公开(公告)日：2012-03-20

申请号：US12093262

申请日：2006-11-10

申请人： Hans-Jorg Fink ,  Martin Bayer ,  Reiner Bidenbach ,  Yoshiyuki Kono

发明人： Hans-Jorg Fink ,  Martin Bayer ,  Reiner Bidenbach ,  Yoshiyuki Kono

IPC分类号： G01R33/07 ,  G01B7/14

CPC分类号： G01D3/08

摘要： Disclosed is an integrated electronic circuit comprising a core circuit that generates a useful signal as well as a buffer for storing the useful signal. The buffer stores the last read value of the useful signal for a predetermined period of time when the power supply is interrupted, and the buffer is disconnected from the power supply of the other circuits.

摘要翻译： 公开了一种集成电子电路，其包括产生有用信号的核心电路以及用于存储有用信号的缓冲器。 缓冲器在电源中断的预定时间段存储有用信号的最后读取值，并且缓冲器与其他电路的电源断开。

公开(公告)号：US20090079420A1

公开(公告)日：2009-03-26

申请号：US12093262

申请日：2006-11-10

申请人： Hans-Jorg Fink ,  Martin Bayer ,  Reiner Bidenbach ,  Yoshiyuki Kono

发明人： Hans-Jorg Fink ,  Martin Bayer ,  Reiner Bidenbach ,  Yoshiyuki Kono

IPC分类号： H02H3/20 ,  G01B7/00

CPC分类号： G01D3/08

摘要： Disclosed is an integrated electronic circuit comprising a core circuit that generates a useful signal as well as a buffer for storing the useful signal. The buffer stores the last read value of the useful signal for a predetermined period of time when the power supply is interrupted, and the buffer is disconnected from the power supply of the other circuits.

摘要翻译： 公开了一种集成电子电路，其包括产生有用信号的核心电路以及用于存储有用信号的缓冲器。 缓冲器在电源中断的预定时间段存储有用信号的最后读取值，并且缓冲器与其他电路的电源断开。

公开(公告)号：US20090180497A1

公开(公告)日：2009-07-16

申请号：US12350580

申请日：2009-01-08

申请人： Reiner Bidenbach ,  Martin Bayer ,  Hans-Jorg Fink

发明人： Reiner Bidenbach ,  Martin Bayer ,  Hans-Jorg Fink

IPC分类号： H04J3/06

CPC分类号： H04L7/044 ,  H04J3/0638 ,  H04L12/4035 ,  H04L2012/40267

摘要： Disclosed is a method and device for transmitting data between at least two transmitters and a receiver which are connected to a bus. A synchronization signal is applied to the bus and a number of data volume counters corresponding to the number of transmitters reduced by one is set to a predefined initial value. A first transmitter transmits in the form of data elements a predefined data volume allocated to the transmitter over the bus to the receiver. The data volume values of the other transmitters are selected so that only one transmitter at any given time simultaneously transmits on the bus.

摘要翻译： 公开了一种用于在连接到总线的至少两个发射机和接收机之间传送数据的方法和装置。 同步信号被施加到总线，并且与减少一个的发送器的数量相对应的数量的数据量计数器被设置为预定的初始值。 第一发射机以数据元素的形式将通过总线分配给发射机的预定数据量传输到接收机。 选择其他发射机的数据音量值，使得任何给定时间只有一个发射机同时在总线上发射。

公开(公告)号：US20070260946A1

公开(公告)日：2007-11-08

申请号：US11417520

申请日：2006-05-04

申请人： Manfred Ullrich ,  Martin Bayer ,  Hans-Jorg Fink ,  Reiner Bidenbach ,  Thilo Rubehn

发明人： Manfred Ullrich ,  Martin Bayer ,  Hans-Jorg Fink ,  Reiner Bidenbach ,  Thilo Rubehn

IPC分类号： G11C29/00

CPC分类号： G11C29/52 ,  G11C16/04 ,  G11C16/10 ,  G11C16/3436 ,  G11C16/3445 ,  G11C16/3459 ,  G11C16/349 ,  G11C16/3495 ,  G11C2029/0409

摘要： A method and circuitry for checking the programming (P) and deletion (L) operations of memory cells (5) in a nonvolatile memory device (1). Parallel to the programming (P) or deletion (L) operations of the actual memory cells (5) the respective programming or deletion process is carried out on at least one similar checking cell (4.1, 4.2, 4.3), with the programming (P) or deletion (L) operations being less favorable by a defined extent than the programming (P) or deletion (L) operations of the actual memory cells (5). From the content of the checking cell (4.1, 4.2, 4.3) an evaluation device (6) determines whether the programming (P) or deletion (L) operation was successful or not, and a corresponding output signal (ak) indicative thereof is produced.

摘要翻译： 一种用于检查非易失性存储器件（1）中的存储器单元（5）的编程（P）和删除（L）操作的方法和电路。 与实际存储单元（5）的编程（P）或删除（L）操作并行，在至少一个类似的校验单元（4.1,4.2,4.3）上进行相应的编程或删除处理，其中编程（P ）或删除（L）操作比实际存储器单元（5）的编程（P）或删除（L）操作更不利于定义的程度。 从检查单元（4.1,4.2,4.3）的内容，评价装置（6）判断编程（P）或删除（L）的操作是否成功，并且生成表示其的对应的输出信号（ak） 。

公开(公告)号：US20090015242A1

公开(公告)日：2009-01-15

申请号：US11949393

申请日：2008-02-21

申请人： Martin Bayer ,  Hans-Jorg Fink

发明人： Martin Bayer ,  Hans-Jorg Fink

IPC分类号： G01R35/00

CPC分类号： G01R35/00 ,  G01R33/07 ,  H01L22/14 ,  H01L2924/0002 ,  H01L2924/014 ,  H01L2924/00

摘要： In a process for testing the measurement accuracy of at least one magnetic field sensor, in particular during manufacturing, a semiconductor wafer that has at least two semiconductor chips is provided. A measurement coil is integrated into at least one first semiconductor chip, and a magnetic field-sensitive electric circuit is integrated into at least one second semiconductor chip that forms the magnetic field sensor. The first semiconductor chip, of which at least one is present, is positioned at an exciter coil that is supplied with current in order to generate a reference magnetic field. With the aid of the measurement coil a first measured value that is dependent on the magnetic flux density is acquired and the current in the exciter coil is adjusted depending on the first measured value. The second semiconductor chip, of which at least one is present, is positioned at the exciter coil. With the aid of the electronic circuit a second measured value that is dependent on the magnetic flux density is acquired and compared with a reference value range.

摘要翻译： 在用于测试至少一个磁场传感器的测量精度的过程中，特别是在制造期间，提供具有至少两个半导体芯片的半导体晶片。 测量线圈集成到至少一个第一半导体芯片中，并且磁场敏感电路集成到形成磁场传感器的至少一个第二半导体芯片中。 其中存在至少一个的第一半导体芯片位于被提供有电流以便产生参考磁场的励磁线圈上。 借助于测量线圈，获得取决于磁通密度的第一测量值，并根据第一测量值调整励磁线圈中的电流。 其中存在至少一个的第二半导体芯片位于激励器线圈处。 借助于电子电路，获得取决于磁通密度的第二测量值并与参考值范围进行比较。