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公开(公告)号:US20150235601A1
公开(公告)日:2015-08-20
申请号:US14422410
申请日:2013-12-17
发明人: Jieqiong Wang
IPC分类号: G09G3/36
CPC分类号: G09G3/3607 , G02F1/13624 , G02F2001/13606 , G09G3/3655 , G09G2300/0819 , G09G2300/0876 , G09G2320/0233
摘要: The present disclosure provides an array substrate, a display panel and a display device. The array substrate includes: a plurality of data lines and a plurality of gate lines configured to divide a display region into a plurality of display sub-regions; a pixel electrode arranged at each display sub-region; and a TFT arranged at each display sub-region, a source electrode of the TFT being electrically connected to the data line, a drain electrode thereof being electrically connected to the pixel electrode and a gate electrode thereof being electrically connected to the gate line, wherein a parasitic capacitor is formed between the gate electrode and the drain electrode of the TFT. The array substrate further includes a switch circuit configured to enable both ends of the parasitic capacitor to be electrically connected when a gate driving signal of the TFT is changed from a high level to a low level.
摘要翻译: 本公开提供了阵列基板,显示面板和显示装置。 阵列基板包括:多条数据线和多条栅极线,被配置为将显示区域划分为多个显示子区域; 布置在每个显示子区域处的像素电极; 以及TFT,其布置在每个显示子区域处,TFT的源电极电连接到数据线,其漏电极电连接到像素电极,其栅电极电连接到栅极线,其中 在TFT的栅电极和漏电极之间形成寄生电容器。 阵列基板还包括开关电路,其被配置为当TFT的栅极驱动信号从高电平变为低电平时,使寄生电容器的两端电连接。