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公开(公告)号:US11244140B2
公开(公告)日:2022-02-08
申请号:US16905997
申请日:2020-06-19
发明人: Xiaozhou Zhan , Cheng Li , Yanna Xue , Yajie Feng , Kuiyuan Wang , Yue Geng
IPC分类号: G06K9/00
摘要: An electronic apparatus and a texture recognition device are described that relate to image recognition technologies. The texture recognition device includes a sensing layer, a transparent contact layer, a light shielding layer, and a plurality of light sources. The sensing layer includes a plurality of photosensitive units distributed in an array; the transparent contact layer is disposed on a side of the sensing layer; the light shielding layer is disposed between the sensing layer and the transparent contact layer, and including a plurality of light transmission portions arranged in an array; and the light sources are distributed in an array on a side of the light shielding layer close to the transparent contact layer, and light emitted by the light sources is reflected by the transparent contact layer and transmitted to the photosensitive units by passing through the light transmission portions.
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公开(公告)号:US11271030B2
公开(公告)日:2022-03-08
申请号:US16965941
申请日:2020-01-16
发明人: Gang Hua , Chuncheng Che , Cheng Li , Jian Wang , Yanna Xue , Yong Zhang , Chia Chiang Lin
IPC分类号: G01T1/20 , H01L27/146
摘要: A detection panel and a manufacturing method thereof are disclosed. The detection panel includes a first substrate and a second substrate, and the first substrate includes a light detection layer; the second substrate includes a drive circuit; the first substrate and the second substrate are opposite to each other for cell assembly, and the drive circuit is coupled to the light detection layer to read a photosensitive signal generated by the light detection layer.
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公开(公告)号:US20190066560A1
公开(公告)日:2019-02-28
申请号:US15773688
申请日:2017-09-20
发明人: Lei Mi , Shijun Wang , Yanna Xue
摘要: The present disclosure discloses a shift register, a gate line driving method, an array substrate, and a display apparatus, and belongs to the field of displays. The shift register comprises a plurality of shift register units each connected to a group of gate lines on an array substrate, wherein different shift register units are connected to different groups of gate lines, and each group of gate lines comprises at least two gate lines; and a control unit configured to control turn-on and turn-off of the gate lines, wherein the control unit is further configured to control various gate lines in a high resolution region to be turned on and turned off line by line, and control at least two adjacent gate lines in a low resolution region to be turned on and turned off synchronously.
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