公开(公告)号：US5815438A

公开(公告)日：1998-09-29

申请号：US810170

申请日：1997-02-28

申请人： Sameer S. Haddad ,  Pau-Ling Chen

发明人： Sameer S. Haddad ,  Pau-Ling Chen

IPC分类号： G11C16/26 ,  G11C16/06

CPC分类号： G11C16/3427 ,  G11C16/26

摘要： There is provided an improved method for eliminating hot-carrier disturb during a read operation in a NAND memory architecture in which a floating gate device is used as a select gate. A first positive pulse voltage having a ramp-rate characteristic on its leading edge is applied to the drain of the floating gate device during the read operation. Simultaneously, a second positive pulse voltage is applied to the control gate of the floating gate device during the read operation so as to overlap the first positive pulse voltage.

摘要翻译： 提供了一种在浮动栅极器件用作选择栅极的NAND存储器架构中在读取操作期间消除热载波干扰的改进方法。 在读取操作期间，在其前沿具有斜率特性的第一正脉冲电压被施加到浮动栅极器件的漏极。 同时，在读取操作期间，第二正脉冲电压施加到浮动栅极器件的控制栅极，以便与第一正脉冲电压重叠。