Organic light emitting diode display
    61.
    发明授权
    Organic light emitting diode display 失效
    有机发光二极管显示

    公开(公告)号:US08315070B2

    公开(公告)日:2012-11-20

    申请号:US12629198

    申请日:2009-12-02

    IPC分类号: H02B1/01

    CPC分类号: H05K5/0017

    摘要: An organic light emitting diode display includes a panel assembly having a display section and a pad section, and a bezel that couples with the panel assembly. The bezel includes a back on which the panel assembly is placed, side walls located at an edge of the back of the bezel, and a protrusion reinforcing portion formed at a region corresponding to the pad section and a vicinity of the pad section in the back of the bezel.

    摘要翻译: 有机发光二极管显示器包括具有显示部分和垫部分的面板组件和与面板组件耦合的边框。 所述边框包括背面,所述面板组件放置在所述背面上,位于所述边框背部边缘的侧壁和形成在与所述垫部分相对应的区域处的突起加强部分和所述背部中的所述垫部分附近 的表圈。

    ELECTRONIC DEVICE HAVING ORGANIC LIGHT EMITTING DIODE DISPLAY
    62.
    发明申请
    ELECTRONIC DEVICE HAVING ORGANIC LIGHT EMITTING DIODE DISPLAY 有权
    具有有机发光二极管显示器的电子设备

    公开(公告)号:US20120212966A1

    公开(公告)日:2012-08-23

    申请号:US13337624

    申请日:2011-12-27

    IPC分类号: F21V15/01

    摘要: An electronic device improves an impact-resistance characteristic of an organic light emitting diode (OLED) display. The electronic device includes an organic light emitting diode (OLED) display including a panel assembly for forming an organic light emitting element, and a housing including a housing main body for receiving the organic light emitting diode (OLED) display. The housing includes a housing main body including a first space for receiving the panel assembly and a second space for receiving a printed circuit board, an upper cover, and a lower cover. The housing main body includes a bottom formed to distinguish a first space and a second space in the housing, and also includes a bent unit on an edge, and a side wall in which the bent unit is buried to be combined with the edge of the bottom.

    摘要翻译: 电子器件提高了有机发光二极管(OLED)显示器的抗冲击特性。 电子设备包括有机发光二极管(OLED)显示器,其包括用于形成有机发光元件的面板组件,以及壳体,其包括用于接收有机发光二极管(OLED)显示器的壳体主体。 壳体包括壳体主体,其包括用于接收面板组件的第一空间和用于接收印刷电路板,上盖和下盖的第二空间。 壳体主体包括形成为区分壳体中的第一空间和第二空间的底部,并且还包括在边缘上的弯曲单元和侧壁,弯曲单元被埋入以与边缘的边缘组合 底部。

    FLIP-FLOP CIRCUIT AND SCAN FLIP-FLOP CIRCUIT
    63.
    发明申请
    FLIP-FLOP CIRCUIT AND SCAN FLIP-FLOP CIRCUIT 有权
    FLIP-FLOP电路和扫描FLIP-FLOP电路

    公开(公告)号:US20110231723A1

    公开(公告)日:2011-09-22

    申请号:US13049427

    申请日:2011-03-16

    IPC分类号: G01R31/3177 G06F11/25

    CPC分类号: G06F11/24

    摘要: A scan flip-flop circuit includes a pulse generator, a dynamic input unit and a latch output unit. The pulse generator generates a pulse signal which is enabled in synchronization with a rising edge of a clock signal in a normal mode, and is selectively enabled in synchronization with the rising edge of the clock signal in response to a logic level of a scan input signal in a scan mode. The dynamic input unit precharges a first node to a power supply voltage in a first phase of the clock signal, selectively discharges the first node in the normal mode, and discharges the first node in the scan mode. The latch output unit latches an internal signal provided from the first node to provide an output data, and determines whether the output data is toggled based on the clock signal and a previous state of the output data.

    摘要翻译: 扫描触发电路包括脉冲发生器,动态输入单元和锁存器输出单元。 脉冲发生器产生脉冲信号,其在正常模式下与时钟信号的上升沿同步使能,并且响应于扫描输入信号的逻辑电平而与时钟信号的上升沿同步地选择性地使能 处于扫描模式。 动态输入单元在时钟信号的第一阶段中将第一节点预充电到电源电压,以正常模式选择性地放电第一节点,并以扫描模式放电第一节点。 闩锁输出单元锁存从第一节点提供的内部信号以提供输出数据,并且基于时钟信号和输出数据的先前状态来确定输出数据是否被切换。

    Flip-flop circuit having scan function
    64.
    发明授权
    Flip-flop circuit having scan function 有权
    具有扫描功能的触发电路

    公开(公告)号:US07994823B2

    公开(公告)日:2011-08-09

    申请号:US12795916

    申请日:2010-06-08

    IPC分类号: H03K19/096

    摘要: A flip-flop circuit having a scan function includes an internal clock generator to receive a clock signal, a scan enable signal, and a first input signal, and to output an internal timing signal based on each of the clock signal, the scan enable signal, and the first input signal. The circuit includes a dynamic input unit to receive a second input signal, the scan enable signal, a first timing signal, and the internal timing signal, and to output a first output signal. The circuit also includes a static output unit to receive the first timing signal and the first output signal and to output a static output signal, and the dynamic input unit outputs the first output signal corresponding to one of the first input signal and the second input signal, respectively, based on a status of the scan enable signal.

    摘要翻译: 具有扫描功能的触发器电路包括内部时钟发生器,用于接收时钟信号,扫描使能信号和第一输入信号,并且基于每个时钟信号输出内部定时信号,扫描使能信号 和第一输入信号。 该电路包括用于接收第二输入信号,扫描使能信号,第一定时信号和内部定时信号的动态输入单元,并输出第一输出信号。 该电路还包括静态输出单元,用于接收第一定时信号和第一输出信号并输出​​静态输出信号,动态输入单元输出对应于第一输入信号和第二输入信号之一的第一输出信号 ,分别基于扫描使能信号的状态。

    Aquatic light emitting device
    65.
    发明授权
    Aquatic light emitting device 有权
    水族发光装置

    公开(公告)号:US07837345B2

    公开(公告)日:2010-11-23

    申请号:US12146609

    申请日:2008-06-26

    IPC分类号: F21V33/00

    摘要: An aquatic light emitting device comprising a plurality of point light emitting units and a plurality of linear light emitting units is disclosed. The point light emitting unit comprises a floating member, a light source part, and a power supply part. The floating member includes a hollow body which has an internal space isolated from the outside so as to give buoyancy, one or more junction portions formed on an outer surface thereof, and has a light inlet opening formed on an upper part, and a string connected to a lower surface of the hollow body. The light source part is attached to the upper surface of the floating member, has an isolated internal space with light outlet openings provided at the upper and lower surfaces thereof, and a light source and a light source control circuit contained in the isolated internal space. The power supply part is located on the upper surface of the light source part and includes a solar cell. The linear light emitting unit comprises at least one optical fiber which is introduced into the hollow body through a hole formed at the junction portion, one end of which is arranged at the light inlet opening of the hollow body, and part of which extends outwards through the junction portion, and is surrounded by a transparent tube.

    摘要翻译: 公开了一种包括多个点光发射单元和多个线性发光单元的水发光装置。 点光发射单元包括浮动元件,光源部分和电源部分。 浮动构件包括:空心体,其具有与外部隔离的内部空间,以提供浮力;形成在其外表面上的一个或多个接合部,并且具有形成在上部的光入口,并且连接有串 到中空体的下表面。 光源部分附接到浮动部件的上表面,具有隔离的内部空间,在其上表面和下表面设置有出光口,以及包含在隔离的内部空间中的光源和光源控制电路。 电源部位于光源部的上表面,具有太阳能电池。 线性发光单元包括至少一个光纤,其通过形成在接合部分处的孔被引入中空本体,该孔的一端设置在中空体的光入口处,并且其一部分向外延伸穿过 连接部分,并被透明管包围。

    Flip-Flop Capable of Operating at High-Speed
    67.
    发明申请
    Flip-Flop Capable of Operating at High-Speed 审中-公开
    触发器能够高速运行

    公开(公告)号:US20090237137A1

    公开(公告)日:2009-09-24

    申请号:US12404982

    申请日:2009-03-16

    申请人: Min-Su Kim

    发明人: Min-Su Kim

    IPC分类号: H03K3/356 H03K3/00

    摘要: A flip-flop is provided for minimizing an input-output (D-Q) delay. The flip-flop includes a pull-up unit that receives a signal from a first node, is connected between a power voltage source and a second node, and pulls-up a voltage of the second node. A pull-down unit receives the signal from the first node, is connected between a ground voltage source and the second node, and pulls-down the voltage of the second node. A latch unit is connected to the second node and latches and outputs a signal transferred to the second node. The pull-up unit pulls-up the second node in response to one of a clock signal and a pulse signal, and the pull-down unit pulls-down the second node in response to the other one of the clock signal and the pulse signal.

    摘要翻译: 提供了一种用于最小化输入输出(D-Q)延迟的触发器。 触发器包括从第一节点接收信号的上拉单元,连接在电源电压源和第二节点之间,并且上拉第二节点的电压。 下拉单元接收来自第一节点的信号,连接在地电压源和第二节点之间,并且拉下第二节点的电压。 锁存单元连接到第二节点并锁存并输出传送到第二节点的信号。 上拉单元响应于时钟信号和脉冲信号中的一个上拉第二节点,并且下拉单元响应于另一个时钟信号和脉冲信号而拉下第二节点 。

    PULSE OPERATED FLIP-FLOP CIRCUIT HAVING TEST-INPUT FUNCTION AND ASSOCIATED METHOD
    68.
    发明申请
    PULSE OPERATED FLIP-FLOP CIRCUIT HAVING TEST-INPUT FUNCTION AND ASSOCIATED METHOD 有权
    具有测试输入功能和相关方法的脉冲操作FLIP-FLOP电路

    公开(公告)号:US20090115481A1

    公开(公告)日:2009-05-07

    申请号:US12256244

    申请日:2008-10-22

    申请人: Min-Su Kim

    发明人: Min-Su Kim

    IPC分类号: H03K3/00 H03K3/02

    摘要: The pulse generation circuit generates a first pulse signal and a complementary second pulse signal. The first and second pulse signals are activated simultaneously in a normal mode and activated selectively in response to a test input signal in a test mode. A multiplexing input circuit selects and outputs one of a data input signal and a test input signal as a latch input signal in response to the first pulse signal and the second pulse signal. The latch input signal corresponds to the data input signal in the normal mode and corresponds to the test input signal in the test mode. The latching circuit latches the latch input signal to generate data output signal. The length of data transfer path is reduced, and DtoQ delay can be decreased.

    摘要翻译: 脉冲发生电路产生第一脉冲信号和互补的第二脉冲信号。 第一和第二脉冲信号在正常模式下同时被激活并且响应于测试模式下的测试输入信号而被选择性地激活。 复用输入电路响应于第一脉冲信号和第二脉冲信号,选择并输出数据输入信号和测试输入信号中的一个作为锁存输入信号。 锁存输入信号对应于正常模式下的数据输入信号,对应于测试模式下的测试输入信号。 锁存电路锁存锁存器输入信号以产生数据输出信号。 减少数据传输路径的长度,减少DtoQ延迟。

    Gated clock logic circuit
    69.
    发明授权
    Gated clock logic circuit 有权
    门控时钟逻辑电路

    公开(公告)号:US07365575B2

    公开(公告)日:2008-04-29

    申请号:US11266659

    申请日:2005-11-02

    申请人: Min-Su Kim

    发明人: Min-Su Kim

    IPC分类号: H03K19/096

    摘要: A gated clock logic circuit includes a pulse generator and a precharged latch. The pulse generator generates a pulse signal in response to a clock signal, and the precharged latch generates a gated clock signal in response to the clock signal, the pulse signal, and a control signal.

    摘要翻译: 门控时钟逻辑电路包括脉冲发生器和预充电锁存器。 脉冲发生器响应于时钟信号产生脉冲信号,并且预充电锁存器响应于时钟信号,脉冲信号和控制信号产生门控时钟信号。

    Voltage conversion circuit with stable transition delay characteristic
    70.
    发明授权
    Voltage conversion circuit with stable transition delay characteristic 有权
    具有稳定转换延迟特性的电压转换电路

    公开(公告)号:US07355446B2

    公开(公告)日:2008-04-08

    申请号:US11429175

    申请日:2006-05-05

    申请人: Min-Su Kim

    发明人: Min-Su Kim

    IPC分类号: H03K19/0175

    摘要: A voltage conversion circuit changes an input signal of a first voltage into an output signal of a second voltage. The circuit includes an input terminal receiving an input signal, an output terminal generating an output signal, and first and second level-shifting units connected in parallel between the input and output terminals. The first and second level-shifting units have different transition delay characteristics, enabling rising and falling transition delays to be variable in the same ratio when the first and second voltages are changed.

    摘要翻译: 电压转换电路将第一电压的输入信号改变为第二电压的输出信号。 电路包括接收输入信号的输入端子,产生输出信号的输出端子以及在输入和输出端子之间并联连接的第一和第二电平移动单元。 第一和第二电平移位单元具有不同的转变延迟特性,使得当第一和第二电压改变时,上升和下降转换延迟可以以相同的比例变化。