Floating point addition pipeline configured to perform floating
point-to-integer and integer-to-floating point conversion operations
    61.
    发明授权
    Floating point addition pipeline configured to perform floating point-to-integer and integer-to-floating point conversion operations 失效
    浮点附加流水线配置为执行浮点到整数和整数到浮点转换操作

    公开(公告)号:US6131104A

    公开(公告)日:2000-10-10

    申请号:US49851

    申请日:1998-03-27

    申请人: Stuart F. Oberman

    发明人: Stuart F. Oberman

    摘要: An optimized multimedia execution unit configured to perform vectored floating point and integer instructions. In one embodiment, the execution unit includes an add/subtract pipeline having far and close data paths. The far data path handles effective addition operations, as well as effective subtraction operations for operands having an absolute exponent difference greater than one. The close data path, conversely, handles effective subtraction operations for operands having an absolute exponent difference less than or equal to one. The close data path includes an adder unit configured to generate a first and second output value. The first output value is equal to the first input operand plus an inverted version of the second input operand, while the second output value is equal to the first output value plus one. The two output values are conveyed to a multiplexer unit, which selects one of the output values as a preliminary subtraction result based on a final selection signal generated from a plurality of preliminary selection signals that are based on the carry in signal to the most significant bit of the first adder output value. Selection of the first or second output value in the close data path effectuates the round-to-nearest operation for the output of the adder. The execution unit may also be configured, in another embodiment, to perform floating point-to-integer and integer-to-floating point conversions. The floating point-to-integer conversions may be executed in the far data path, with the integer-to-floating point instructions executed in the close data path.

    摘要翻译: 优化的多媒体执行单元被配置为执行矢量的浮点和整数指令。 在一个实施例中,执行单元包括具有远近数据路径的加/减流水线。 远数据路径处理有效的加法运算,以及具有大于1的绝对指数差的操作数的有效减法运算。 相反,关闭数据路径处理具有小于或等于1的绝对指数差的操作数的有效减法操作。 关闭数据路径包括被配置为产生第一和第二输出值的加法器单元。 第一个输出值等于第一个输入操作数加第二个输入操作数的反转版本,而第二个输出值等于第一个输出值加一。 两个输出值被传送到多路复用器单元,该多路复用器单元基于从基于进位信号到最高有效位的多个初步选择信号生成的最终选择信号来选择输出值之一作为初步减法结果 的第一加法器输出值。 关闭数据路径中的第一或第二输出值的选择为加法器的输出实现了舍入到最近的运算。 在另一个实施例中,执行单元还可以被配置为执行浮点整数和整数到浮点转换。 可以在远程数据路径中执行浮点整数转换,其中在关闭数据路径中执行整数到浮点指令。

    Close path selection unit for performing effective subtraction within a
floating point arithmetic unit

    公开(公告)号:US06088715A

    公开(公告)日:2000-07-11

    申请号:US49750

    申请日:1998-03-27

    申请人: Stuart F. Oberman

    发明人: Stuart F. Oberman

    摘要: An optimized multimedia execution unit configured to perform vectored floating point and integer instructions. In one embodiment, the execution unit includes an add/subtract pipeline having far and close data paths. The far data path is configured to handle effective addition operations, as well as effective subtraction operations for operands having an absolute exponent difference greater than one. The close data path, conversely, is configured to handle effective subtraction operations for operands having an absolute exponent difference less than or equal to one. The close data path includes an adder unit configured to generate a first and second output value. The first output value is equal to the first input operand plus an inverted version of the second input operand, while the second output value is equal to the first output value plus one. The two output values are conveyed to a multiplexer unit, which selects one of the output values as a preliminary subtraction result based on a final selection signal received from a selection unit. The selection unit generates the final selection signal from a plurality of preliminary selection signals based on the carry in signal to the most significant bit of the first adder output value. Selection of the first or second output value in the close data path effectuates the round-to-nearest operation for the output of the adder. The execution unit may also be configured, in another embodiment, to perform floating point-to-integer and integer-to-floating point conversions. The floating point-to-integer conversions may be efficiently executed in the far data path of the add/subtract pipeline, with the integer-to-floating point instructions executed in the close data path. The execution unit may also include a plurality of add/subtract pipelines, allowing vectored add, subtract and integer/floating point conversion instructions to be performed. The execution unit be also expanded to handle additional arithmetic instructions (such as reverse subtract and accumulate functions) by appropriate input multiplexing. Finally, functions like extreme value (minimum/maximum) and comparison instructions may also be implemented by proper multiplexing of output results.