公开(公告)号：US5805484A

公开(公告)日：1998-09-08

申请号：US608611

申请日：1996-02-29

申请人： Yasunari Ikeda ,  Tamotsu Ikeda ,  Takahiro Okada

发明人： Yasunari Ikeda ,  Tamotsu Ikeda ,  Takahiro Okada

IPC分类号： G06F17/14 ,  G06F15/00

CPC分类号： G06F17/142

摘要： In an orthogonal function generating circuit, orthogonal functions are generated with high precision by a small-scale circuit. The circuit uses an orthogonal transformation between time domain digital data and frequency domain digital data to obtain one of the time domain digital data and the frequency domain digital data from the other digital data. The circuit has a first data holder for holding first data and a second data holder for holding second data. A first multiplier multiplies the first data, and a second multiplier multiplies the first data by a second coefficient. A third multiplier multiplies the second data by a third coefficient, and afourth multiplier multiplies the second data by a fourth coefficient. An adder adds an output of the first multiplier to an output of the third multiplier, and outputs the result of addition so as to feed back the result of addition to the first data holder; and a subtracter subtracts an output of the second multiplier from an output of the fourth multiplier and for outputs the result of subtraction so as to feed back the result of subtraction to the second data holder.

摘要翻译： 在正交函数发生电路中，通过小规模电路以高精度生成正交函数。 该电路采用时域数字数据和频域数字数据之间的正交变换，从其他数字数据中获取时域数字数据和频域数字数据之一。 电路具有用于保持第一数据的第一数据保持器和用于保持第二数据的第二数据保持器。 第一乘法器乘以第一数据，第二乘法器将第一数据乘以第二系数。 第三乘法器将第二数据乘以第三系数，并且第一乘法器将第二数据乘以第四系数。 加法器将第一乘法器的输出与第三乘法器的输出相加，并输出相加结果，以将加法结果反馈到第一数据保持器; 并且减法器从第四乘法器的输出中减去第二乘法器的输出，并输出相减结果，以便将减法结果反馈到第二数据保持器。

公开(公告)号：US5724394A

公开(公告)日：1998-03-03

申请号：US503942

申请日：1995-07-19

申请人： Tamotsu Ikeda ,  Yasunari Ikeda ,  Takahiro Okada

发明人： Tamotsu Ikeda ,  Yasunari Ikeda ,  Takahiro Okada

IPC分类号： H04L27/00 ,  C04B28/18 ,  H03M13/23 ,  H03M13/25 ,  H03M13/41 ,  H04L25/08 ,  H04L27/38 ,  H04L87/06

CPC分类号： H03M13/41 ,  H03M13/25 ,  H03M13/6325 ,  H03M13/6502

摘要： In a Viterbi decoder and a Viterbi decoding method, a modulating method and a phase of a carrier wave, employed in a transmitter apparatus can be automatically followed up in a receiver apparatus. The Viterbi decoder is comprised of a phase shifting circuit for shifting a phase of a reproduced carrier wave of a reception signal in response to a phase-shift control signal, thereby producing a phase-shifted signal; a distance calculating circuit for receiving the phase-shifted signal to calculate a square Euclidean distance between a signal point of the phase-shifted signal and a signal point defined in a predetermined modulating method; path metric calculator for calculating a path metric with respect to each of the phases from the calculated square Euclidean distance value; a selector means for selecting a minimum value of the path metric for each of the phases; and a phase-shift control signal producing circuit for producing the phase-shift control signal used to control the phase shifting means in such a manner that the phase of the reproduced carrier wave of the reception signal is set to a phase corresponding to the minimum path metric value.

摘要翻译： 在维特比解码器和维特比解码方法中，可以在接收机装置中自动跟踪在发送装置中采用的载波的调制方法和相位。 维特比解码器包括一个移相电路，用于响应于相移控制信号移位一个接收信号的再生载波的相位，从而产生相移信号; 距离计算电路，用于接收相移信号以计算相移信号的信号点与以预定调制方法定义的信号点之间的平方欧几里德距离; 路径度量计算器，用于根据所计算的平方欧几里德距离值计算相对于每个相位的路径度量; 选择器装置，用于选择每个相位的路径度量的最小值; 以及相移控制信号产生电路，用于产生用于控制相移装置的相移控制信号，使得接收信号的再现载波的相位被设置为与最小路径相对应的相位 度量值。

公开(公告)号：US5471464A

公开(公告)日：1995-11-28

申请号：US281255

申请日：1994-07-26

申请人： Yasunari Ikeda

发明人： Yasunari Ikeda

IPC分类号： H04J11/00 ,  H04L27/26 ,  H04L27/38 ,  H04J1/00

CPC分类号： H04L27/2647

摘要： When an orthogonal frequency division multiplex (OFDM) modulated signal is demodulated by discrete Fourier transformation (DFT), DFT is performed using a time window of an accurate phase synchronized with the synchronization symbol. Therefore, first, the reproduction clock is divided to generate a basic time window signal. The results of the DFT processing on the OFDM signal are used to detect the phase deviation and the phase of the basic time window signal is adjusted based on that phase deviation. Preferably, the results of DFT are used for synchronization pull-in to generate a stable time window signal. More preferably a DFT circuit for demodulating the OFDM modulated signal and a DFT circuit for generating a time window signal are provided separately.

摘要翻译： 当通过离散傅里叶变换（DFT）解调正交频分复用（OFDM）调制信号时，使用与同步符号同步的精确相位的时间窗来执行DFT。 因此，首先，再现时钟被分割以生成基本时间窗信号。 对OFDM信号进行DFT处理的结果用于检测相位偏差，基于该相位偏差调整基本时间窗信号的相位。 优选地，DFT的结果用于同步拉入以产生稳定的时间窗信号。 更优选分别提供用于解调OFDM调制信号的DFT电路和用于产生时间窗信号的DFT电路。