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公开(公告)号：US5329560A
公开(公告)日：1994-07-12
申请号：US885489
申请日：1992-05-19
摘要： A circuit and method for generating drive signals having a frequency synchronized to a reference frequency signal is disclosed. The circuit includes a PLL that includes a motor, and a circuit for generating a signal having a frequency proportional to the speed of the motor. A phase detector produces a signal for a time proportional to a phase difference between the motor speed signal and a reference frequency signal. A first phase difference measuring circuit produces a first voltage output signal at a first gain proportional to the phase difference when the duration of the phase detector signal is less than a predetermined time. A second phase difference measuring circuit produces a second output signal at a second gain when the duration of the phase detector signal is greater than the predetermined time. The first and second output signals are summed and applied to control the speed of the motor.
摘要翻译： 公开了一种用于产生具有与参考频率信号同步的频率的驱动信号的电路和方法。 该电路包括一个PLL，它包括一个电动机，和一个电路，用于产生一个与电动机速度成比例的频率的信号。 相位检测器产生与电动机速度信号和参考频率信号之间的相位差成比例的时间的信号。 当相位检测器信号的持续时间小于预定时间时，第一相位差测量电路产生与相位差成比例的第一增益的第一电压输出信号。 当相位检测器信号的持续时间大于预定时间时，第二相位差测量电路以第二增益产生第二输出信号。 第一和第二输出信号被相加和应用以控制电动机的速度。
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公开(公告)号：US5306988A
公开(公告)日：1994-04-26
申请号：US770577
申请日：1991-10-03
摘要： A circuit for operating a polyphase dc motor, for example of the type having a plurality of "Y" connected stator coils, has circuitry for unambiguously determining the actual instantaneous position of the rotor of the motor, circuitry for determining a desired rotor position precedent to executing a desired commutation sequence, and circuitry for executing the desired commutation sequence when the circuit for determining the actual instantaneous position of the rotor detects that the rotor is actually in the desired rotor position. The circuitry for unambiguously determining the actual instantaneous position of the rotor includes a back emf amplifier switchably connected to at least one floating coil, and circuitry for determining when the voltage received by the back emf amplifier crosses a reference voltage from a predetermined direction. In one embodiment, the circuit, includes mask circuitry for inhibiting the reference voltage crossing detection circuitry for a predetermined time after a change in the commutation sequence. The mask circuitry includes clocked up and first and second down counters, the second down counter being inhibited to be clocked until the first down counter has reached a predetermined count, and the reference voltage crossing circuitry being inhibited until at least the second down counter has completed its count. When a reference voltage crossing is detected, the count of the up counter is loaded into both the first and second down counters, then the up counter is reset to begin a new commutation period count.
摘要翻译： 用于操作多相直流电动机的电路，例如具有多个“Y”个连接的定子线圈的类型的电路具有用于明确地确定电动机的转子的实际瞬时位置的电路，用于确定期望的转子位置先例的电路 执行期望的换向序列，以及用于当用于确定转子的实际瞬时位置的电路检测到转子实际上处于期望的转子位置时执行所需换向序列的电路。 用于明确地确定转子的实际瞬时位置的电路包括可切换地连接到至少一个浮动线圈的反电动势放大器，以及用于确定由反电动势放大器接收的电压何时从预定方向穿过参考电压的电路。 在一个实施例中，电路包括用于在换向序列改变之后的预定时间内禁止参考电压交叉检测电路的掩模电路。 掩模电路包括时钟提供和第一和第二下计数器，第二向下计数器被禁止被计时直到第一递减计数器达到预定计数，并且参考电压交叉电路被禁止，直到至少第二递减计数器已经完成 它的数量。 当检测到参考电压交叉时，向上计数器的计数被加载到第一和第二递减计数器中，然后上升计数器被复位以开始新的换向周期计数。
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63.发明授权
公开(公告)号：US5297024A
公开(公告)日：1994-03-22
申请号：US983690
申请日：1992-12-01
CPC分类号： G11B21/083
摘要： A driver circuit for providing drive current to a coil for positioning a read/write head of a memory disk system and method are presented. The driver circuit includes a pair of high side driver transistors having current paths connected between respective terminals of the coil and a voltage source, a first pair of low side driver transistors having current paths connected between respective terminals of the coil and a first voltage sense node, and a second pair of low side driver transistors having current paths connected between respective terminals of the coil and a second voltage sense node. A first sense resistor is connected between the first and second voltage sense nodes, and a second sense resistor is connected between the second sense node and a reference potential. A first set of selection switches operates to select one of the pair of high side driver transistors and one transistor of each of the first and second pairs of the low side driver transistors to establish a current path through the selected transistors and the coil in response to a direction signal. A second set of selection switches operates to select one or the other of the selected low side driver transistors in response to a seek and track-follow mode selection signal. A circuit is also provided for applying a coil current signal to a low side driver transistor selected by the first and second sets of selection switches.
摘要翻译： 提供了一种用于向线圈提供驱动电流以用于定位存储盘系统的读/写头的驱动电路和方法。 驱动器电路包括一对高边驱动晶体管，其具有连接在线圈的各个端子和电压源之间的电流路径，第一对低侧驱动晶体管具有连接在线圈的各个端子之间的电流路径和第一电压感测节点 以及第二对低侧驱动晶体管，其具有连接在线圈的相应端子和第二电压感测节点之间的电流路径。 第一感测电阻器连接在第一和第二电压感测节点之间，第二感测电阻器连接在第二感测节点和参考电位之间。 第一组选择开关用于选择一对高侧驱动器晶体管中的一个和第一和第二对低侧驱动晶体管中的每一个的一个晶体管，以响应于所选择的晶体管和线圈建立电流通路 方向信号。 第二组选择开关用于响应于搜索跟踪跟踪模式选择信号来选择所选择的低侧驱动晶体管中的一个或另一个。 还提供一种用于将线圈电流信号施加到由第一和第二组选择开关选择的低侧驱动晶体管的电路。
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64.发明授权Insulated gate enhancement mode field effect transistor with slew-rate control on drain output 失效绝缘栅增强型场效应晶体管，对漏极输出进行压摆率控制
公开(公告)号：US5157351A
公开(公告)日：1992-10-20
申请号：US751410
申请日：1991-08-28
IPC分类号： H01F7/18 , H03F3/16 , H03K17/16 , H03K17/695
CPC分类号： H03K17/166
摘要： Voltage slew-rate control for inductive load connected to the drain of an insulated gate enhancement mode field effect transistor is disclosed. The voltage slew-rate control is accomplished by incorporating a current integrator between the gate and drain of the field effect transistor, thereby effectively annihilating the capacitance of the field effect transistor which has heretofore proven to be generally responsible for instability and oscillations when slew-rate control is attempted in such a circuit. The current integrator includes a capacitor and a current source in circuit with a high speed unity gain buffer amplifier. The buffer amplifier preferably has a low impedance through the frequencies of interest to prevent the natural resonances of stray capacitances with the inductive load.
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