公开(公告)号：US4905184A

公开(公告)日：1990-02-27

申请号：US99447

申请日：1987-09-21

申请人： Rangaswamy P. Giridhar ,  Jeffrey T. Reeve

发明人： Rangaswamy P. Giridhar ,  Jeffrey T. Reeve

IPC分类号： G06F3/06 ,  G06F13/12

CPC分类号： G06F3/0601 ,  G06F13/122 ,  G06F2003/0691

摘要： A buffer memory in a peripheral controller has dedicated page and word location segments for each one of a multiple number of attached peripheral units. Additionally, an auxiliary segment provides memory for the active status of each one of the multiple number of data transfer cycle operations which may be occurring concurrently and which status can be accessed at the optimum time so that each initiated data transfer cycle can be completed in a time-saving fashion. Memory address control means are provided for accessing page segments and word locations therein in order to insert data therein or to remove data therefrom. A special queue segment is available to provide concurrent status information for each I/O command initiated by a host computer.

摘要翻译： 外围控制器中的缓冲存储器具有用于多个连接的外围单元中的每一个的专用页和字位置段。 此外，辅助段提供用于可以同时发生的多个数据传送周期操作中的每一个的活动状态的存储器，并且可以在最佳时间访问哪个状态，使得每个启动的数据传输周期可以在 节省时间。 提供存储器地址控制装置用于访问其中的页面段和字位置，以便在其中插入数据或从中移除数据。 特殊队列段可用于为主机发起的每个I / O命令提供并发状态信息。

公开(公告)号：US4903195A

公开(公告)日：1990-02-20

申请号：US271381

申请日：1988-11-14

申请人： Shigeo Honma

发明人： Shigeo Honma

IPC分类号： G06F13/38 ,  G06F3/06 ,  G06F12/08 ,  G06F13/10 ,  G11B20/10

CPC分类号： G06F3/0601 ,  G06F2003/0691

摘要： The invention relates to a method for controlling the data transfer between the rotary memory device such as a disk drive apparatus and the central processing unit. In this invention, after positioning to the read start location designated by a command from the central processing unit for determining the read start location, pre-fetch of the buffer operation is started without waiting for the read command subsequent to that command.

摘要翻译： 本发明涉及一种用于控制诸如盘驱动装置的旋转存储装置与中央处理装置之间的数据传送的方法。 在本发明中，在定位到由中央处理单元指定的用于确定读取开始位置的读取开始位置之后，开始缓冲操作的预取，而不等待该命令之后的读取命令。

公开(公告)号：US4897840A

公开(公告)日：1990-01-30

申请号：US166391

申请日：1988-03-10

申请人： Eckardt Weiss ,  Peter Wentzel

发明人： Eckardt Weiss ,  Peter Wentzel

IPC分类号： G06F11/10 ,  G06F3/06 ,  G11B20/18

CPC分类号： G06F3/0601 ,  G11B20/1833 ,  G06F2003/0691

摘要： In order to reduce the time losses that arise when reading a plurality of successive data blocks, because of the interruption of the read operation in the case of recognized data errors, all required data blocks are read in one pass and are transferred into a correspondingly enlarged buffer memory (DAT-SP). Error syndromes (ES) resulting from the recognized data errors are initially intermediately stored in allocation to the erroneous data, until a correction of the data in the data memory (DAT-SP) is possible.

摘要翻译： 为了减少在读取多个连续的数据块时产生的时间损失，由于在识别的数据错误的情况下读取操作的中断，所有所需的数据块被一次读取并被转移到相应的扩大 缓冲存储器（DAT-SP）。 由识别的数据错误产生的误差综合征（ES）最初被中间存储在对错误数据的分配中，直到数据存储器（DAT-SP）中的数据的校正是可能的。

公开(公告)号：US4791564A

公开(公告)日：1988-12-13

申请号：US161387

申请日：1988-02-22

申请人： Yasuyuki Takai

发明人： Yasuyuki Takai

IPC分类号： G06F3/12 ,  G06F3/06 ,  G06F12/00 ,  G06F12/08 ,  G06F13/00

CPC分类号： G06F3/0601 ,  G06F2003/0691

摘要： A memory file system suitable for a computer such as a personal computer comprises a central processing unit (CPU) for controlling the operation of the computer, an external memory such as a sequential access type floppy disc for storing data, a printer for printing out the data with the help of the CPU, and a random access memory (RAM) for storing code data to be forwarded into the the external memory. The RAM stores the data together with a directory.

摘要翻译： 适用于诸如个人计算机的计算机的存储器文件系统包括用于控制计算机的操作的中央处理单元（CPU），用于存储数据的诸如顺序存取型软盘的外部存储器，用于打印出 在CPU的帮助下的数据，以及用于存储要转发到外部存储器中的代码数据的随机存取存储器（RAM）。 RAM将数据与目录一起存储。

公开(公告)号：US4667286A

公开(公告)日：1987-05-19

申请号：US684769

申请日：1984-12-20

申请人： Mark S. Young ,  John Drew ,  Michael C. Shebanow

发明人： Mark S. Young ,  John Drew ,  Michael C. Shebanow

IPC分类号： G06F3/06 ,  G06F5/06 ,  G06F5/16 ,  G06F13/38

CPC分类号： G06F5/16 ,  G06F3/0601 ,  G06F2003/0691

摘要： A method and apparatus for transferring data between a disk and a CPU is disclosed comprising a pair of toggling header buffers and a pair of toggling data buffers. In operation, data is transferred between a sector on a disk and one of the data buffers under the control of one of the header buffers. While the data in the header buffer is being transferred between the data buffer and a CPU, data is transferred between an adjacent sector on the disk and the other data buffer under the control of the other header buffer. The rate of transfer of data between the data buffer and the CPU is higher than the rate of transfer of the data between the disk and the other data buffer. This provides sufficient time to check the data transferred from and to the CPU for errors and to address a new sector on the disk prior to the completion of the data transfer of the previous sector between the disk and the data buffer. By means of the method and apparatus disclosed, all sectors in a track on a disk can be transferred between a disk and a CPU within a single revolution of the disk.

摘要翻译： 公开了一种用于在盘和CPU之间传送数据的方法和装置，包括一对切换头缓冲器和一对切换数据缓冲器。 在操作中，数据在磁盘上的扇区和其中一个数据缓冲器之间在一个标题缓冲器的控制下传送。 当头缓冲器中的数据在数据缓冲器和CPU之间传输时，数据在磁盘上的相邻扇区和另一个数据缓冲器之间在另一个头缓冲器的控制下传输。 数据缓冲区和CPU之间的数据传输速率高于磁盘和其他数据缓冲区之间的数据传输速率。 这提供了足够的时间来检查从CPU传送出来的错误数据，并且在盘和数据缓冲器之前的先前扇区的数据传送完成之前，在盘上寻址新的扇区。 通过所公开的方法和装置，磁盘上的磁道中的所有扇区可以在盘的一圈内在盘和CPU之间传送。

公开(公告)号：US4415970A

公开(公告)日：1983-11-15

申请号：US208891

申请日：1980-11-14

申请人： Robert E. Swenson ,  Lawrence D. Sasscer ,  Benjamin T. George

发明人： Robert E. Swenson ,  Lawrence D. Sasscer ,  Benjamin T. George

IPC分类号： G06F3/06 ,  G06F12/08 ,  G06F13/00

CPC分类号： G06F3/0601 ,  G06F12/0866 ,  G06F2003/0691

摘要： In a system wherein processors are connected through channel units to disk devices, two storage control units (SCU's) are provided between the channel units and the disk devices. The SCU's receive commands from the processor and issue seek instructions to the devices to locate the disk space specified by the commands, provided that a copy of the data from the specified disk space is not resident in a cache store. The commands may be queued for a time in a memory which is accessible by both SCU's. Before issuing a seek instruction to a device, an SCU first determines whether it is the only SCU having a path through a channel unit back to the processor which issued the command or whether there is a path from each SCU to the processor. If both SCU's have a path back to the processor, the SCU issues an untagged seek instruction to the device. If not, the SCU issues a tagged seek instruction to the device. When the disk device completes a seek resulting from a tagged instruction, it sends an interrupt to the SCU which issued the seek and that SCU then notifies the processor which issued the command. In response to the notification the processor issues the command a second time and it is then executed under the control of the SCU. When a device completes a seek resulting from an untagged seek instruction it sends an interrupt to both SCU's and either one may respond to it.

摘要翻译： 在处理器通过信道单元连接到磁盘设备的系统中，在信道单元和磁盘设备之间提供两个存储控制单元（SCU）。 SCU从处理器接收命令并发出查询指令给设备以定位由命令指定的磁盘空间，前提是指定的磁盘空间的数据副本不驻留在缓存存储中。 这些命令可能在两个SCU可访问的存储器中排队一段时间。 在向设备发出寻道指令之前，SCU首先确定是否唯一具有通过通道单元的路径返回到发出命令的处理器的SCU或者是否存在从每个SCU到处理器的路径。 如果两个SCU都有回到处理器的路径，则SCU向设备发出未标记的寻道指令。 如果没有，则SCU向设备发出标记的寻道指令。 当磁盘设备完成由带标签的指令产生的寻道时，它向发出寻道的SCU发送一个中断，然后SCU通知发出命令的处理器。 响应于该通知，处理器第二次发出命令，然后在SCU的控制下执行该命令。 当设备完成从未标记的寻道指令产生的寻道时，它会向两个SCU发送一个中断，并且任一个都可以响应它。

公开(公告)号：US4363125A

公开(公告)日：1982-12-07

申请号：US106633

申请日：1979-12-26

申请人： James A. Brewer ,  John A. Lowy

发明人： James A. Brewer ,  John A. Lowy

IPC分类号： G06F3/06 ,  G06F11/10 ,  G06F11/14 ,  G06F11/00 ,  G11C29/00

CPC分类号： G06F11/1008 ,  G06F11/1076 ,  G06F11/14 ,  G06F3/0601 ,  G06F2003/0691

摘要： A high speed readback check of data transferred to a cyclic memory before the data source is lost. The cyclic memory is organized into a number of data blocks, each interleaved with or simultaneously accessible with the other data blocks. Thus, a long data record comprises several data blocks and therefore several cycles of the memory. A readback check of data transferred from a source into the memory is accomplished by writing data into one data block in a first cycle, writing data into another block on the second cycle while reading back the first data block and calculating a check character therefrom, continuing through the writing of the entire record, and reading the last block of written data and calculating the check character, and then comparing the calculated check character with a character calculated from the source data to detect any error before the source of the record is lost.

摘要翻译： 在数据源丢失之前，传输到循环存储器的数据的高速回读检查。 循环存储器被组织成多个数据块，每个数据块与其他数据块交错或同时可访问。 因此，长数据记录包括几个数据块，因此包括存储器的几个周期。 通过将数据从源传送到存储器中的回读检查是通过在第一周期中将数据写入一个数据块来实现的，在第二周期将数据写入另一个块，同时读回第一个数据块并从中继续计算一个校验字符 通过写入整个记录，并读取最后一个写入数据块并计算检查字符，然后将计算的检查字符与从源数据计算的字符进行比较，以在记录源丢失之前检测任何错误。

公开(公告)号：US4228501A

公开(公告)日：1980-10-14

申请号：US917631

申请日：1978-06-21

申请人： John M. Frissell

发明人： John M. Frissell

IPC分类号： G06F13/10 ,  G06F3/06 ,  G06F5/06 ,  G06F13/04

CPC分类号： G06F3/0601 ,  G06F5/06 ,  G06F2003/0691

摘要： Data processing apparatus wherein circuitry for data transfer between a central processor unit (CPU) and a peripheral storage unit, such as a hard disk storage unit, comprises a data transfer bus by which a block of data words being transferred is supplied to a temporary storage unit capable of storing the entire block. Means are provided to prevent any data transfer between the data bus and the CPU interface unit while the block of data words is transferred between the temporary storage unit and the peripheral storage unit and to permit transfer between the CPU interface unit and the bus when data is not being transferred between the temporary storage unit and the peripheral storage unit.

摘要翻译： 数据处理装置，其中用于在中央处理器单元（CPU）和诸如硬盘存储单元的外围存储单元之间的数据传输的电路包括数据传输总线，通过该数据传输总线将传送的数据字块提供给临时存储 能够存储整个块的单元。 提供了用于在数据字块在临时存储单元和外围存储单元之间传送时数据总线与CPU接口单元之间的任何数据传输的装置，并且当数据为 不在临时存储单元和外围存储单元之间传送。

公开(公告)号：US3603770A

公开(公告)日：1971-09-07

申请号：US3603770D

申请日：1969-01-06

申请人： TRANS CONTROLS INC

发明人： REINS EDWARD R JR

IPC分类号： G06F3/06 ,  G06K15/22 ,  G06F13/08 ,  G06F7/00

CPC分类号： G06F3/0601 ,  G06F2003/0691 ,  G06K15/22

摘要： Magnetic tape buffer equipment for use between a digital computer and an incremental plotter, including a tape loop, storage and forward-reverse drive therefor, writing and reading stations and error-checking circuits operating in a system which provides for periodic checks and correction, if required, of the plotter pen position in order that errors in the plotter display are not propagated throughout the plot.

公开(公告)号：US3351914A

公开(公告)日：1967-11-07

申请号：US41320264

申请日：1964-11-23

申请人： GEN PRECISION INC

发明人： STONE GREY E

IPC分类号： G06F3/06 ,  G06F13/22

CPC分类号： G06F3/0601 ,  G06F13/22 ,  G06F2003/0691