公开(公告)号：US20180157416A1

公开(公告)日：2018-06-07

申请号：US15792874

申请日：2017-10-25

申请人： FUJITSU LIMITED

发明人： Chikashi Maeda ,  Yukari Tsuchiyama ,  Takeshi Watanabe ,  Guangyu Zhou

IPC分类号： G06F3/06

CPC分类号： G06F3/061 ,  G06F3/0665 ,  G06F3/0689 ,  G06F2003/0691 ,  G06F2003/0695

摘要： A storage control device configured to control a storage device includes a memory and a processor coupled to the memory and configured to receive a request of writing of data from an information processing device, assign a unit memory area in the storage device in response to the request of writing, determine whether a sequential format processing is to be executed on the unit memory area based on continuity of logical addresses designated by the request of writing, and determine a timing to execute the sequential format processing on the unit memory area based on a number of commands per unit time to the storage device when the sequential format processing is determined to be executed on the unit memory area.

公开(公告)号：US09990141B1

公开(公告)日：2018-06-05

申请号：US15792874

申请日：2017-10-25

申请人： FUJITSU LIMITED

发明人： Chikashi Maeda ,  Yukari Tsuchiyama ,  Takeshi Watanabe ,  Guangyu Zhou

IPC分类号： G11B5/09 ,  G06F13/00 ,  G06F3/06

CPC分类号： G06F3/061 ,  G06F3/0665 ,  G06F3/0689 ,  G06F2003/0691 ,  G06F2003/0695

摘要： A storage control device configured to control a storage device includes a memory and a processor coupled to the memory and configured to receive a request of writing of data from an information processing device, assign a unit memory area in the storage device in response to the request of writing, determine whether a sequential format processing is to be executed on the unit memory area based on continuity of logical addresses designated by the request of writing, and determine a timing to execute the sequential format processing on the unit memory area based on a number of commands per unit time to the storage device when the sequential format processing is determined to be executed on the unit memory area.

公开(公告)号：US20180081848A1

公开(公告)日：2018-03-22

申请号：US15826474

申请日：2017-11-29

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Roger G. Hathorn ,  Bret W. Holley ,  Matthew J. Kalos

IPC分类号： G06F13/40 ,  H04L12/801 ,  G06F3/06 ,  G06F13/16 ,  G06F5/12 ,  G06F13/36

CPC分类号： G06F13/4027 ,  G06F3/0613 ,  G06F3/0656 ,  G06F3/067 ,  G06F5/12 ,  G06F13/1642 ,  G06F13/1673 ,  G06F13/36 ,  G06F2003/0691 ,  G06F2205/126 ,  G06F2213/0008 ,  H04L47/39

摘要： A channel of a host computational device sends a command to transfer data to a control unit included in a storage controller. The channel of the host computational device receives a number of buffer credits from the control unit for communication with the control unit, where the number of buffer credits that is received is based on the control unit monitoring a number of transfer ready operations and a number of retry operations during a monitoring period while communicating with a plurality of channels that includes the channel.

公开(公告)号：US20170329668A1

公开(公告)日：2017-11-16

申请号：US15666569

申请日：2017-08-02

申请人： Silicon Motion Inc.

发明人： Tsung-Chieh Yang

IPC分类号： G06F11/10 ,  G06F12/02 ,  G06F3/06

CPC分类号： G06F11/1044 ,  G06F3/0679 ,  G06F11/1048 ,  G06F11/1072 ,  G06F12/02 ,  G06F12/0246 ,  G06F2003/0691 ,  G06F2212/1044 ,  G06F2212/7201 ,  G06F2212/7205

摘要： A flash memory control apparatus includes a data read/write interface and a controller. The data read/write interface is arranged for coupling a first flash memory and a second flash memory, wherein the first flash memory includes a first storage plane and a first buffer, and the second flash memory includes a second storage plane and a second buffer. The controller is coupled to the data read/write interface, and is arranged for transmitting a plurality of valid data sets stored in the first storage plane to the second buffer through the data read/write interface. After an erase cycle is performed on the first storage plane, the controller further programs the plurality of valid data sets transmitted to the second buffer into the first storage plane.

公开(公告)号：US09696913B1

公开(公告)日：2017-07-04

申请号：US14684536

申请日：2015-04-13

申请人： Cohesity, Inc.

发明人： Mohit Aron ,  Ganesha Shanmuganathan

IPC分类号： G06F3/06 ,  G06F12/02

CPC分类号： G06F3/0611 ,  G06F3/0643 ,  G06F3/0656 ,  G06F3/0685 ,  G06F12/0238 ,  G06F12/08 ,  G06F2003/0691 ,  G06F2003/0692 ,  G06F2212/1016 ,  G06F2212/217

摘要： Techniques are disclosed for storing data in a plurality of storage tiers on a computing node. A node receives a request to write data corresponding to at least a first portion of a file. The node determines whether to perform the request either as an in-place write or as an out-of-place write. Upon determining to perform the request as the in-place write, the node writes the data to a first location on a storage tier which currently stores the first portion of the file. Upon determining to perform the request as the out-of-place write, the node writes the data to a second location on one of the storage tiers, other than the first location.

公开(公告)号：US09547473B2

公开(公告)日：2017-01-17

申请号：US14457367

申请日：2014-08-12

申请人： Sony Computer Entertainment Europe Limited

发明人： Neil Jonathan Brown ,  Phillip Rogers

IPC分类号： G06F13/28 ,  G06F13/12 ,  G06F13/38 ,  G06F5/16 ,  G06F1/16 ,  G06F9/44 ,  G06F3/06 ,  G06F9/46 ,  G06F9/48 ,  G06F13/32 ,  G09G5/39 ,  G06F11/14

CPC分类号： G06F5/16 ,  G06F1/1643 ,  G06F3/061 ,  G06F3/0656 ,  G06F3/0683 ,  G06F9/4418 ,  G06F9/461 ,  G06F9/4881 ,  G06F11/1438 ,  G06F11/1446 ,  G06F13/32 ,  G06F2003/0691 ,  G09G5/39

摘要： A data processing apparatus comprises a processor having an internal state dependent upon execution of application program code, the processor being configured to generate display data relating to images to be displayed and to buffer display data relating to a most recent period of execution of a currently executing application. The apparatus includes RAM for storing temporary data relating to a current operational state of program execution. The apparatus also includes a data transfer controller configured to transfer data from the RAM relating to the currently executing application, data relating to a current internal state of the processor and buffered display data to suspend data memory, and to transfer data from the suspend data memory to RAM and to the processor to recreate an execution state of an application at a time the suspend instruction was executed, and to retrieve display data relating to the resumed application.

摘要翻译： 数据处理装置包括具有取决于应用程序代码的执行的内部状态的处理器，所述处理器被配置为生成与要显示的图像相关的显示数据，并且缓冲与当前执行的最近执行周期有关的显示数据 应用。 该装置包括用于存储与程序执行的当前操作状态有关的临时数据的RAM。 该装置还包括：数据传送控制器，被配置为从与RAM相关的当前执行的应用程序传输数据，与处理器的当前内部状态有关的数据和缓冲的显示数据以暂停数据存储器，并且从挂起数据存储器传送数据 到RAM和处理器，以在执行暂停指令时重新创建应用的执行状态，并且检索与恢复的应用有关的显示数据。

公开(公告)号：US09542321B2

公开(公告)日：2017-01-10

申请号：US14260463

申请日：2014-04-24

申请人： LSI Corporation

发明人： Zhiwei Wu ,  Zhibin Li ,  Kurt J. Worrell ,  Joseph R. Robert ,  Feina Wen

IPC分类号： G06F9/38 ,  G06F12/02 ,  G06F12/08 ,  G06F3/06 ,  G11B20/10

CPC分类号： G06F12/084 ,  G06F3/0608 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0644 ,  G06F3/0656 ,  G06F3/0665 ,  G06F3/0689 ,  G06F12/0802 ,  G06F12/0871 ,  G06F2003/0691 ,  G06F2003/0692 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/165 ,  G06F2212/21 ,  G06F2212/222 ,  G06F2212/224 ,  G06F2212/251 ,  G06F2212/262 ,  G06F2212/281 ,  G06F2212/282 ,  G06F2212/312 ,  G06F2212/462 ,  G06F2212/6042 ,  G06F2212/70 ,  G06F2212/7203 ,  G11B20/10527

摘要： The disclosure is directed to a system and method for interleaving data utilizing a random access buffer that includes a plurality of independently accessible memory slots. The random access buffer is configured to store slices of incoming data sectors in free memory slots, where a free memory slot is identified by a status flag associated with a logical address of the free memory slot. Meanwhile, a label buffer is configured to store labels associated with the slices of the incoming data sectors in a sequence based upon an interleaving scheme. Media sectors including the interleaved data slices are read out from the memory slots of the random access buffer in order of the sequence of labels stored by the label buffer. As the media sectors are read out of the random access buffer, the corresponding memory slots are freed up for incoming slices of the next super-sector.

摘要翻译： 本公开涉及一种用于使用包括多个独立可访问的存储器时隙的随机存取缓冲器对数据进行交织的系统和方法。 随机访问缓冲器被配置为在空闲存储器时隙中存储输入数据扇区的片段，其中通过与空闲存储器时隙的逻辑地址相关联的状态标志来识别空闲存储器时隙。 同时，标签缓冲器被配置为基于交织方案在序列中存储与输入数据扇区的片段相关联的标签。 包括交错数据片的介质扇区按照由标签缓冲器存储的标签顺序从随机存取缓冲器的存储器槽读出。 随着媒体扇区被从随机存取缓冲器中读出，相应的存储器槽被释放以用于下一个超级扇区的传入片段。

公开(公告)号：US09418015B2

公开(公告)日：2016-08-16

申请号：US14695667

申请日：2015-04-24

申请人： NetApp Inc.

发明人： Rajesh Sundaram ,  Douglas Paul Doucette ,  David Grunwald ,  Jeffrey S. Kimmel ,  Ashish Prakash

IPC分类号： G06F12/00 ,  G06F12/08 ,  G06F3/06

CPC分类号： G06F12/0866 ,  G06F3/0611 ,  G06F3/065 ,  G06F3/0656 ,  G06F3/068 ,  G06F3/0685 ,  G06F12/0802 ,  G06F2003/0691 ,  G06F2003/0692 ,  G06F2212/1024 ,  G06F2212/217 ,  G06F2212/222 ,  G06F2212/281

摘要： Among other things, one or more techniques and/or systems are provided for storing data within a hybrid storage aggregate comprising a lower-latency storage tier and a higher-latency storage tier. In particular, frequently accessed data, randomly accessed data, and/or short lived data may be stored (e.g., read caching and/or write caching) within the lower-latency storage tier. Infrequently accessed data and/or sequentially accessed data may be stored within the higher-latency storage tier. Because the hybrid storage aggregate may comprise a single logical container derived from the higher-latency storage tier and the lower-latency storage tier, additional storage and/or file system functionality may be implemented across the storage tiers. For example, deduplication functionality, caching functionality, backup/restore functionality, and/or other functionality may be provided through a single file system (or other type of arrangement) and/or a cache map implemented within the hybrid storage aggregate.

公开(公告)号：US20160132263A1

公开(公告)日：2016-05-12

申请号：US15000718

申请日：2016-01-19

申请人： Google Inc.

发明人： Andrew Kadatch ,  Lawrence E. Greenfield

IPC分类号： G06F3/06

CPC分类号： G06F3/0619 ,  G06F3/0613 ,  G06F3/0643 ,  G06F3/0656 ,  G06F3/0665 ,  G06F3/067 ,  G06F3/0685 ,  G06F11/1044 ,  G06F11/1076 ,  G06F2003/0691 ,  G06F2211/1009 ,  G06F2211/1028

摘要： Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for storing data on storage nodes. In one aspect, a method includes receiving a file to be stored across a plurality of storage nodes each including a cache. The is stored by storing portions of the file each on a different storage node. A first portion is written to a first storage node's cache until determining that the first storage node's cache is full. A different second storage node is selected in response to determining that the first storage node's cache is full. For each portion of the file, a location of the portion is recorded, the location indicating at least a storage node storing the portion.

摘要翻译： 方法，系统和装置，包括在计算机存储介质上编码的用于在存储节点上存储数据的计算机程序。 一方面，一种方法包括：接收要跨越多个存储节点存储的文件，每个存储节点包括高速缓存。 通过将文件的各部分存储在不同的存储节点上来存储。 将第一部分写入第一存储节点的高速缓存，直到确定第一存储节点的高速缓存已满。 响应于确定第一存储节点的高速缓存已满，选择不同的第二存储节点。 对于文件的每个部分，记录该部分的位置，该位置指示至少存储该部分的存储节点。

公开(公告)号：US20160092299A1

公开(公告)日：2016-03-31

申请号：US14499010

申请日：2014-09-26

申请人： Yogesh B. WAKCHAURE ,  David J. PELSTER ,  Eric L. HOFFMAN ,  Xin GUO ,  Aliasgar S. MADRASWALA

发明人： Yogesh B. WAKCHAURE ,  David J. PELSTER ,  Eric L. HOFFMAN ,  Xin GUO ,  Aliasgar S. MADRASWALA

IPC分类号： G06F11/10 ,  G11C29/52 ,  G11C11/56

CPC分类号： G06F11/1068 ,  G06F3/0619 ,  G06F3/0656 ,  G06F3/0679 ,  G06F3/0688 ,  G06F11/1048 ,  G06F11/106 ,  G06F11/1072 ,  G06F12/0246 ,  G06F12/0868 ,  G06F2003/0691 ,  G06F2212/1016 ,  G06F2212/202 ,  G06F2212/2022 ,  G06F2212/214 ,  G06F2212/222 ,  G06F2212/403 ,  G06F2212/7201 ,  G06F2212/7203 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C29/42 ,  G11C29/52 ,  G11C2029/0411 ,  G11C2211/5641 ,  G11C2211/5642 ,  G11C2211/5643 ,  G11C2211/5648

摘要： A page data (e.g., upper page data) received from a host is stored in a transfer buffer of a controller of a solid state drive. Another page data (e.g., lower page data) is read from a non-volatile memory (e.g., a NAND memory) to store in the transfer buffer as an error corrected page data. The error corrected page data and the page data are written to the non-volatile memory. In additional embodiments, a controller loads a page data (e.g., upper page data) received from the host in one or more NAND page buffers. The controller reads another page data (e.g., lower page data) from a NAND memory to store in a transfer buffer as an error corrected page data. The error corrected page data stored in the transfer buffer is loaded to the one or more NAND page buffers.

摘要翻译： 从主机接收的页数据（例如，上页数据）被存储在固态驱动器的控制器的传送缓冲器中。 从非易失性存储器（例如，NAND存储器）中读取另一页数据（例如，较低页数据），以作为纠错页数据存储在传送缓冲器中。 错误校正的页面数据和页面数据被写入非易失性存储器。 在另外的实施例中，控制器在一个或多个NAND页缓冲器中加载从主机接收的页数据（例如，上页数据）。 控制器从NAND存储器读取另一个页数据（例如，下页数据），以存储在转移缓冲器中作为纠错页数据。 存储在传送缓冲器中的纠错页数据被加载到一个或多个NAND页缓冲器。