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公开(公告)号：US10948636B2
公开(公告)日：2021-03-16
申请号：US16021548
申请日：2018-06-28
Inventor： Xiongzhou Wei , Min Li , Chao Liu , Huaqing Liu
Abstract: A color filter substrate, a manufacturing method thereof, and a corresponding display panel. The manufacturing method of the color filter substrate includes: providing a substrate; forming an array of a plurality of pixel units on the substrate, wherein each pixel unit comprises a first sub-pixel, a second sub-pixel and at least two third sub-pixels, the at least two third sub-pixels being made of an irreversible temperature-sensitive pigment; and performing a temperature-variation treatment on one third sub-pixel in each pixel unit such that the one third sub-pixel changes color and becomes a fourth sub-pixel.
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公开(公告)号：US10935833B2
公开(公告)日：2021-03-02
申请号：US16344874
申请日：2018-05-29
Inventor： Xiaoyuan Wang , Yan Fang , Wu Wang , Ruilin Bi , Yajie Bai
IPC: G02F1/1335 , G02F1/1339 , G02F1/1368 , G02F1/1337 , G02F1/1343 , G02F1/1362
Abstract: The present application provides a display apparatus having a display area and a black matrix area surrounding the display area. The display apparatus includes a first display substrate and a second display substrate opposite to each other and assembled together. The first display substrate includes a first base substrate, and a black matrix on the first base substrate and in the black matrix area. The second display substrate includes a second base substrate, and an array of a plurality of thin film transistors on the second base substrate for driving image display in the display apparatus. The black matrix has a serrated edge surrounding the display area.
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公开(公告)号：US10930682B2
公开(公告)日：2021-02-23
申请号：US16408838
申请日：2019-05-10
Inventor： Yajie Bai , Wu Wang , Xiaoyuan Wang , Zhuo Xu , Ruilin Bi
IPC: H01L27/12 , G02F1/1362
Abstract: An array substrate, a method for manufacturing the same, and a display apparatus are provided. The array substrate includes multiple pixel units defined by crossed gate lines and data lines, and each unit includes a pixel electrode and a thin film transistor. The array substrate further includes repairing units corresponding to target pixel electrodes in the pixel electrodes, where each repairing unit is connected to a corresponding target pixel electrode and a corresponding target signal line, and is configured to control the target pixel electrode connected to the repairing unit to be electrically connected to or insulated from the target signal line connected to the repairing unit.
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公开(公告)号：US10921655B2
公开(公告)日：2021-02-16
申请号：US16473970
申请日：2018-09-14
Inventor： Xiaoyuan Wang , Ni Yang , Yan Fang , Hengyi Xu , Yunze Li
IPC: G02F1/133 , G02F1/136 , G02F1/1343 , G02F1/1362 , G02F1/1368
Abstract: A pixel structure includes a plate electrode, an interlayer insulating layer and strip electrodes which are sequentially arranged on a substrate. The strip electrodes include first strip electrode(s), second strip electrode(s) and third strip electrode(s). The first strip electrode(s) and the plate electrode are oppositely arranged, so that an orthographic projection of the first strip electrode(s) on the substrate at least partially overlaps with an orthographic projection of the plate electrode on the substrate. The first strip electrode(s) and the plate electrode are configured to be applied with different voltages during display.
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公开(公告)号：US20210026467A1
公开(公告)日：2021-01-28
申请号：US16096560
申请日：2018-04-09
Inventor： Kangpeng DANG , Cheng ZUO , Shuai HOU
IPC: G06F3/041 , G02F1/1333 , H05K1/03 , H05K1/02
Abstract: A touch display panel and a liquid crystal display device are disclosed. The touch display panel comprises: a substrate (1); a Chip-On-Film (COF) (2), one end of the COF (2) being bound on the substrate and the other end of the COF (2) having a first binding pin (21); and a flexible circuit board (3), one end of the flexible circuit board (3) being bound on the substrate (1) and the other end of the flexible circuit board (3) having a second binding pin (31), wherein a width L2 of the second binding pin (31) is greater than a width L1 of the first binding pin (21).
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Patent Agency Ranking
公开(公告)号：US10832628B2
公开(公告)日：2020-11-10
申请号：US16410373
申请日：2019-05-13
Inventor： Zhiyou Liu , Yihjen Hsu , Lijun Xiao , Shaohong Gao , Jinjia Luo , Yanan Zhao , Xiuqin Zhang
IPC: G09G3/36
Abstract: The present disclosure provides a gate on-state voltage supply unit, a gate on-state voltage supply method, a display driving module and a display device. The gate on-state voltage supply unit is used in the display device including a display driving module. The gate on-state voltage supply unit includes a shutdown determination module and a voltage supply module. The shutdown determination module is configured to determine whether the display device has been shut down, and when the display device has been shut down, transmit a boosting control signal to the voltage supply module. The voltage supply module is configured to, upon the receipt of the boosting control signal, boost a gate on-state voltage to acquire a boosted gate on-state voltage, and apply the boosted gate on-state voltage to a gate driving circuit of the display driving module.
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77.发明授权公开(公告)号：US10816842B2
公开(公告)日：2020-10-27
申请号：US16304014
申请日：2018-02-12
Inventor： Peng Li , Zhe Li , Jaikwang Kim , Zhijian Qi , Keke Gu , Zhidan Sun , Xiaoji Li , Haoxiang Fan , Lan Xin , Junhong Lu , Xiaochen Cui
IPC: G02F1/1333 , G02F1/1335 , G02F1/1362
Abstract: An array substrate, a method for manufacturing the same, a liquid crystal display panel, and a display device are provided. The array substrate includes a first substrate, signal lines and an insulating layer; the insulating layer is disposed on the first substrate, and grooves are disposed on a side of the insulating layer facing away from the first substrate and disposed in a region of the insulating layer corresponding to a non-display region of the array substrate; and the signal lines are disposed on inner walls of the grooves, a direction of the inner walls of the grooves is arranged such that at least a portion of light incident on the signal lines from a side of the first substrate facing away from the signal lines is reflected to a display region of the array substrate.
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公开(公告)号：US20200326599A1
公开(公告)日：2020-10-15
申请号：US16098311
申请日：2018-03-15
Inventor： Haoxiang FAN , Keke GU , Peng LI , Xiaoji LI , Zhe LI , Junhong LU , Wei ZHU , Peng QIN , Wenliang LIU
IPC: G02F1/1343 , G02F1/1333
Abstract: An array substrate and a display device including the array substrate are provided. The array substrate includes: an upper electrode layer on a base substrate and including a first upper electrode strip and a second upper electrode strip; a lower electrode layer between the base substrate and the upper electrode layer. The lower electrode layer includes a portion that does not overlap the first upper electrode strip and the second upper electrode strip in a direction perpendicular to an upper surface of the base substrate. The array substrate includes a pixel electrode strip and a common electrode strip which are in a same layer and both correspond to a region between the first upper electrode strip and the second upper electrode strip.
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79.发明申请公开(公告)号：US20200301223A1
公开(公告)日：2020-09-24
申请号：US16892918
申请日：2020-06-04
Inventor： Zhicai Xu , Ruilin Bi , Jiandong Guo , Zhulin Liu , Shouqiang Zhang , Kui Zhang
IPC: G02F1/1362 , H01L27/28 , H01L27/12 , G02F1/1368 , G02F1/1343
Abstract: An array substrate includes: a base substrate, a gate line extending in a first direction, a data line extending in a second direction, and a pixel electrode layer, the first direction being substantially perpendicular to the second direction, the gate line and the data line defining a plurality of sub-pixel units, and a plurality of first and second common electrode lines electrically connected to each other and disposed in the same layer as the gate lines. The first common electrode line includes two first common electrode line first portions, and the second common electrode line extends in the second direction. The second common electrode line is located between and electrically connects the two first common electrode line first portions. The second common electrode line is located at a center line of the sub-pixel unit.
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公开(公告)号：US10784289B2
公开(公告)日：2020-09-22
申请号：US16333324
申请日：2018-05-22
Inventor： Yulong Chen , Niannian Wang , Yong Xiong , Zhichang Liu , Xiaorui Tian , Linglong Lu , Ziwei Wang , Meng Wei , Xiang Zhang
IPC: H01L27/12 , G09G3/3225 , G09G3/36
Abstract: The present application provides an array substrate. The array substrate in each of a plurality of subpixel areas includes a first thin film transistor having a first gate electrode connected to one of a plurality of gate lines, a first source electrode connected to one of a plurality of data lines, and a first drain electrode connected to a pixel electrode; a second thin film transistor having a second gate electrode, a second source electrode connected to the one of the plurality of data lines, and a second drain electrode connected to the pixel electrode; and a third thin film transistor having a third gate electrode connected to the one of the plurality of data lines, a third source electrode connected to the one of the plurality of gate lines, and a third drain electrode connected to the second gate electrode and one of a plurality of auxiliary signal lines.
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